Electronic Device or Circuit and Method for Fabricating the Same
    1.
    发明申请
    Electronic Device or Circuit and Method for Fabricating the Same 审中-公开
    电子设备或电路及其制造方法

    公开(公告)号:US20080259576A1

    公开(公告)日:2008-10-23

    申请号:US12089255

    申请日:2006-09-29

    IPC分类号: H01L21/58 H05K1/00

    摘要: A method for fabricating an electronic device or circuit, respectively, comprises providing a flexible substrate (1), defining onto the flexible substrate (1) electric components (2, 3, 3′, 3″, 3′″, 7, 11, 12) and interconnects (8), introducing out breaks (4, 4′, 4″, 4a-4s) in the flexible substrate (1) between the electric components and/or interconnects, and forming the flexible substrate (1) into a deformed configuration by deforming, particularly folding, parts of the flexible substrate as determined by the breaks (4, 4′, 4″, 4a-4s).

    摘要翻译: 一种分别制造电子设备或电路的方法,包括提供柔性基板(1),其限定在柔性基板(1)上,电气部件(2,3,3',3“,3”,7“ 11)和互连(8),在电气部件和/或互连之间引入柔性基板(1)中的断裂(4,4',4“,4a-4s),并形成柔性基板 (4,4',4“,4a-4s)确定的柔性基板的部分变形(特别是折叠)变形为变形构型。

    Device and method to read a 2-transistor flash memory cell
    2.
    发明授权
    Device and method to read a 2-transistor flash memory cell 有权
    读取2晶体管闪存单元的器件和方法

    公开(公告)号:US06980472B2

    公开(公告)日:2005-12-27

    申请号:US10498449

    申请日:2002-12-05

    CPC分类号: G11C16/26

    摘要: The present invention relates to electronic memories, more particularly to an improved method and apparatus to read the content of compact 2-transistor flash memory cells.A method of reading a 2-transistor flash memory cell 1 is provided. The memory cell 1 comprises a storage transistor 2 with a storage gate 6 and a selecting transistor 3 with a select gate 7. The method comprises leaving the storage gate 6 floating while the select gate 7 is switched from a first voltage to a second voltage, whereby the first voltage is lower than the second voltage.A device according to the present invention comprises a switching circuit for leaving the storage gate 6 floating while the select gate 7 is switched from the first voltage to the second voltage, the first voltage being lower than the second voltage.

    摘要翻译: 本发明涉及电子存储器,更具体地说,涉及一种读取紧凑型2-晶体管闪存单元的内容的改进方法和装置。 提供读取2晶体管闪存单元1的方法。 存储单元1包括具有存储栅极6的存储晶体管2和具有选择栅极7的选择晶体管3。 该方法包括在选择栅极7从第一电压切换到第二电压的同时使存储栅极6浮动,由此第一电压低于第二电压。 根据本发明的装置包括用于在选择栅极7从第一电压切换到第二电压时使存储栅极6离开的开关电路,第一电压低于第二电压。

    Method of fabricating a dual gate FET
    3.
    发明授权
    Method of fabricating a dual gate FET 有权
    制造双栅极FET的方法

    公开(公告)号:US07741182B2

    公开(公告)日:2010-06-22

    申请号:US11815100

    申请日:2006-01-23

    IPC分类号: H01L21/336

    摘要: The invention provides a method of fabricating an extremely short-length dual-gate FET, using conventional semi-conductor processing techniques, with extremely small and reproducible fins with a pitch and a width that are both smaller than can be obtained with photolithographic techniques. On a protrusion (2) on a substrate (1), a first layer (3) and a second layer (4) are formed, after which the top surface of the protrusion (2) is exposed. A portion of the first layer (3) is selectively removed relative to the protrusion (2) and the second layer (4), thereby creating a fin (6) and a trench (5). Also a method is presented to form a plurality of fins (6) and trenches (5). The dual-gate FET is created by forming a gate electrode (7) in the trench(es) (5) and a source and drain region. Further a method is presented to fabricate an extremely short-length asymmetric dual-gate FET with two gate electrodes that can be biased separately.

    摘要翻译: 本发明提供了一种使用常规半导体处理技术制造极短的双栅极FET的方法,其具有非常小且可重现的鳍,其间距和宽度都小于可以用光刻技术获得的。 在基板(1)上的突起(2)上形成第一层(3)和第二层(4),然后露出突起(2)的上表面。 相对于突起(2)和第二层(4),第一层(3)的一部分被选择性地去除,从而形成翅片(6)和沟槽(5)。 还提出了形成多个翅片(6)和沟槽(5)的方法。 通过在沟槽(5)中形成栅电极(7)和源极和漏极区域来产生双栅极FET。 此外,提出了一种制造具有可分别偏置的两个栅电极的极短的非对称双栅极FET的方法。

    Circuit for providing a constant current

    公开(公告)号:US06559711B2

    公开(公告)日:2003-05-06

    申请号:US09902219

    申请日:2001-07-10

    IPC分类号: G05F110

    CPC分类号: G05F3/30

    摘要: Two substantially identical currents (I1,a, I1,b) are subtracted from each other, while being generated by elements (10, 11) in such a way that noise in the current value of said two currents (I1,a, I1,b) is determined by shot noise. The differential current, determined only by shot noise, is supplied to a capacitor (13). A second current (I2) is used to charge a second capacitor (22, 29). It is periodically determined whether the value of a voltage across the first capacitor (13) is within or outside a range bounded by the (negative and positive values of the) voltage of the second capacitor (22, 29) which has been charged over the same period of time. The currents (I1,b, Ib) are set in dependence on the result of the comparison. The signal to set the currents (I1,b, Ib) also serves as control signal for an element (43) connected as a constant current source. The setting signal and thus the constant current (I0) delivered by the element (43) connected as a current source is to a high degree independent of the temperature sensitivity of different components of the circuit and is determined essentially solely by the ratio of values of similar components (10, 11, 20, 27, 43) of the circuit. By choosing components whose ratio appears in a value of the constant current (I0) delivered by the circuit and which have the same temperature dependence, it is achieved that the temperature dependence disappears completely or substantially completely from the constant current (I0) delivered by the circuit.

    ELECTROCHEMICAL SENSOR DEVICE, METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    ELECTROCHEMICAL SENSOR DEVICE, METHOD OF MANUFACTURING THE SAME 审中-公开
    电化学传感器装置,其制造方法

    公开(公告)号:US20100314699A1

    公开(公告)日:2010-12-16

    申请号:US12517858

    申请日:2007-12-07

    IPC分类号: H01L29/66 H01L21/50

    摘要: An electrochemical sensor device (100) for analysing a sample, the device (100) comprising an electronic chip (101) comprising a sensor portion (102) being sensitive for particles of the sample, a carrier element (103, 104) bonded to the electronic chip (101) to define a fluidic path together with the electronic chip (101), and a counter electrode (105) provided in a surface portion of the carrier element (103, 104).

    摘要翻译: 一种用于分析样品的电化学传感器装置(100),所述装置(100)包括电子芯片(101),所述电子芯片包括对样品颗粒敏感的传感器部分(102),粘合到所述样品的载体元件(103,104) 电子芯片(101)与电子芯片(101)一起限定流体路径,以及设置在载体元件(103,104)的表面部分中的对电极(105)。

    Data processing device with a WOM memory

    公开(公告)号:US07529142B2

    公开(公告)日:2009-05-05

    申请号:US10023165

    申请日:2001-12-18

    IPC分类号: G11C29/00 G06F13/00

    CPC分类号: G11C16/3495 G11C16/349

    摘要: A data processing device has a memory with writeable and erasable locations, such as a flash memory. The memory locations are store WOM codewords (Write Once Memory codewords in which successive generations of data can be encoded by setting bits from zero to one only). A data encoder encodes a received data value in a new codeword from the WOM code, as a function of the received data value and a previous codeword stored in the currently selected location. When the WOM codeword is exhausted the data encoder selects a new currently selected location from a logical series of locations and stores the new codeword in the new currently selected location. When all locations are exhausted a reset circuit resets a content of the locations in the logical series. On reading the currently selected location is read and decoded.

    One-time UV-programmable non-volatile semiconductor memory and method of programming such a semiconductor memory
    10.
    发明授权
    One-time UV-programmable non-volatile semiconductor memory and method of programming such a semiconductor memory 失效
    一次性UV可编程非易失性半导体存储器和编程这种半导体存储器的方法

    公开(公告)号:US06437398B2

    公开(公告)日:2002-08-20

    申请号:US09846599

    申请日:2001-04-30

    IPC分类号: H01L29788

    摘要: One-time UV-programmable read-only memory (1) comprising a number of memory cells in the form of MOS transistors (T) which are arranged in a matrix of rows and columns, each transistor comprising a source and a drain zone (12) and a channel zone (13) formed in a surface zone (11) of a semiconductor substrate (10). Said semiconductor zones adjoin a surface (14) of the semiconductor substrate on which surface a layer structure (17) is formed comprising floating gates (16) and control gates (15). The layer structure is provided with windows (18) through which UV radiation can reach the edges of the floating gates. The memory is further provided with means for generating an electric voltage between the substrate (10) and the control gates (16) during programming the memory by means of UV radiation. Thus, the memory can be programmed without being externally contacted during programming.

    摘要翻译: 一次性UV可编程只读存储器(1)包括以行和列为矩阵排列的MOS晶体管(T)形式的多个存储器单元,每个晶体管包括源极和漏极区域(12) )和形成在半导体衬底(10)的表面区(11)中的沟道区(13)。 所述半导体区域邻接在半导体衬底的表面上形成有层结构(17)的表面(14),其包括浮动栅极(16)和控制栅极(15)。 层结构设置有窗口(18),UV辐射可以通过该窗口到达浮动门的边缘。 存储器还设置有用于在通过UV辐射对存储器进行编程期间在衬底(10)和控制栅极(16)之间产生电压的装置。 因此,可以在编程期间对存储器进行编程而不需要外部接触。