公开(公告)号：US09543428B2

公开(公告)日：2017-01-10

申请号：US14400365

申请日：2013-06-06

申请人： DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto

发明人： Yuichi Takeuchi ,  Naohiro Suzuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto ,  Narumasa Soejima ,  Yukihiko Watanabe

IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L21/82 ,  H01L29/66 ,  H01L29/10 ,  H01L29/872 ,  H01L21/04 ,  H01L21/306 ,  H01L21/308 ,  H01L29/423 ,  H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/861

CPC分类号： H01L29/7811 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/761 ,  H01L21/8213 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/158 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/872

摘要： An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.

摘要翻译： SiC半导体器件具有包含低浓度区域和填充在形成于单元区域的沟槽中的高浓度区域的p型区域。 由低浓度区域提供p型列，并且由高浓度区域提供p +型深层。 因此，由于可以通过由n型漂移层提供的p型列和n型列来形成SJ结构，所以可以降低导通电阻。 由于漏极电位可以被p +型深层阻挡，所以在关断时，施加到栅极绝缘膜的电场可以减轻，从而可以限制栅极绝缘膜的破裂。 因此，SiC半导体器件可以实现导通电阻的降低和栅极绝缘膜的破损的限制。

公开(公告)号：US09818860B2

公开(公告)日：2017-11-14

申请号：US15365150

申请日：2016-11-30

申请人： DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto

发明人： Yuichi Takeuchi ,  Naohiro Suzuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto ,  Narumasa Soejima ,  Yukihiko Watanabe

IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L21/82 ,  H01L29/417 ,  H01L29/66 ,  H01L29/10 ,  H01L29/872 ,  H01L21/04 ,  H01L21/306 ,  H01L21/308 ,  H01L29/423 ,  H01L21/761 ,  H01L29/15 ,  H01L29/06 ,  H01L29/08 ,  H01L29/861

CPC分类号： H01L29/7811 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/761 ,  H01L21/8213 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/158 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/872

摘要： An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.

公开(公告)号：US20150115286A1

公开(公告)日：2015-04-30

申请号：US14400365

申请日：2013-06-06

申请人： Masahiro SUGIMOTO ,  Hidefumi TAKAYA ,  Akitaka SOENO ,  Jun MORIMOTO ,  DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Yuichi Takeuchi ,  Naohiro Suzuki ,  Masahiro Sugimoto ,  Hidefumi Takaya ,  Akitaka Soeno ,  Jun Morimoto ,  Narumasa Soejima ,  Yukihiko Watanabe

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L21/308 ,  H01L29/10 ,  H01L21/04 ,  H01L21/306 ,  H01L29/66 ,  H01L29/16

CPC分类号： H01L29/7811 ,  H01L21/046 ,  H01L21/0475 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/761 ,  H01L21/8213 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/157 ,  H01L29/158 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7813 ,  H01L29/861 ,  H01L29/872

摘要： An SiC semiconductor device has a p type region including a low concentration region and a high concentration region filled in a trench formed in a cell region. A p type column is provided by the low concentration region, and a p+ type deep layer is provided by the high concentration region. Thus, since a SJ structure can be made by the p type column and the n type column provided by the n type drift layer, an on-state resistance can be reduced. As a drain potential can be blocked by the p+ type deep layer, at turnoff, an electric field applied to the gate insulation film can be alleviated and thus breakage of the gate insulation film can be restricted. Therefore, the SiC semiconductor device can realize the reduction of the on-state resistance and the restriction of breakage of the gate insulation film.

摘要翻译： SiC半导体器件具有包含低浓度区域和填充在形成于单元区域的沟槽中的高浓度区域的p型区域。 由低浓度区域提供p型列，并且由高浓度区域提供p +型深层。 因此，由于可以通过由n型漂移层提供的p型列和n型列来形成SJ结构，所以可以降低导通电阻。 由于漏极电位可以被p +型深层阻挡，所以在关断时，施加到栅极绝缘膜的电场可以减轻，从而可以限制栅极绝缘膜的破裂。 因此，SiC半导体器件可以实现导通电阻的降低和栅极绝缘膜的破损的限制。

公开(公告)号：US09640651B2

公开(公告)日：2017-05-02

申请号：US15116288

申请日：2014-10-06

申请人： Hidefumi Takaya ,  Jun Saito ,  Akitaka Soeno ,  Kimimori Hamada ,  Shoji Mizuno ,  Sachiko Aoi ,  Yukihiko Watanabe

发明人： Hidefumi Takaya ,  Jun Saito ,  Akitaka Soeno ,  Kimimori Hamada ,  Shoji Mizuno ,  Sachiko Aoi ,  Yukihiko Watanabe

IPC分类号： H01L29/94 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L21/761 ,  H01L29/16

CPC分类号： H01L29/7811 ,  H01L21/761 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0649 ,  H01L29/0661 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/42368 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813

摘要： A semiconductor device includes a termination trench surrounding a region in which a plurality of gate trenches is provided; a p-type lower end region being in contact with a lower end of the termination trench; a p-type outer circumference region being in contact with the termination trench from an outer circumferential side and exposed on a surface of the semiconductor device; a plurality of guard ring regions of a p-type provided on an outer circumferential side of the p-type outer circumference region and exposed on the surface; and an n-type outer circumference region separating the p-type outer circumference region from the guard ring regions and separating the guard ring regions from each another.

公开(公告)号：US09024330B2

公开(公告)日：2015-05-05

申请号：US14141174

申请日：2013-12-26

申请人： Yukihiko Watanabe ,  Sachiko Aoi ,  Masahiro Sugimoto ,  Akitaka Soeno ,  Shinichiro Miyahara

发明人： Yukihiko Watanabe ,  Sachiko Aoi ,  Masahiro Sugimoto ,  Akitaka Soeno ,  Shinichiro Miyahara

IPC分类号： H01L29/47 ,  H01L29/45 ,  H01L29/16 ,  H01L21/285 ,  H01L29/78 ,  H01L21/04

CPC分类号： H01L29/47 ,  H01L21/0485 ,  H01L21/28518 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7806 ,  H01L29/7813

摘要： A method of manufacturing a semiconductor device includes forming an ohmic electrode in a first area on one of main surfaces of a silicon carbide layer, siliciding the ohmic electrode, and forming a Schottky electrode in a second area on the one of the main surfaces of the silicon carbide layer with self alignment. The second area is exposed where the ohmic electrode is not formed.

摘要翻译： 一种制造半导体器件的方法包括：在碳化硅层的一个主表面上的第一区域中形成欧姆电极，将欧姆电极硅化，并在第二区域中形成肖特基电极 具有自对准的碳化硅层。 在没有形成欧姆电极的情况下暴露第二区域。

公开(公告)号：US09647108B2

公开(公告)日：2017-05-09

申请号：US15025930

申请日：2014-09-15

申请人： DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Naohiro Suzuki ,  Sachiko Aoi ,  Yukihiko Watanabe ,  Akitaka Soeno ,  Masaki Konishi

IPC分类号： H01L29/78 ,  H01L29/16 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/167

CPC分类号： H01L29/7813 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/167 ,  H01L29/66068

摘要： A silicon carbide semiconductor device includes: a substrate; a drift layer; a current dispersion layer; a base region; a source region; trenches; a gate insulation film; a gate electrode; a source electrode; a drain electrode; and a bottom layer. The current dispersion layer is arranged on the drift layer, and has a first conductive type with an impurity concentration higher than the drift layer. The bottom layer has a second conductive type, is arranged under the base region, covers a bottom of each trench including a corner portion of the bottom of the trench, and has a depth equal to or deeper than the current dispersion layer.

公开(公告)号：US10446649B2

公开(公告)日：2019-10-15

申请号：US14652483

申请日：2013-12-19

申请人： DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Tomoo Morino ,  Shoji Mizuno ,  Yuichi Takeuchi ,  Akitaka Soeno ,  Yukihiko Watanabe

IPC分类号： H01L29/16 ,  H01L29/78 ,  H01L29/10 ,  H01L27/088 ,  H01L29/12 ,  H01L21/761 ,  H01L29/06

摘要： A silicon carbide semiconductor device includes: an element isolation layer and an electric field relaxation layer. The element isolation layer is arranged, from the surface of a base region to be deeper than the base region, between a main cell region and a sense cell region, and isolates the main cell region from the sense cell region. The electric field relaxation layer is arranged from a bottom of the base region to be deeper than the element isolation layer. The electric field relaxation layer is divided into a main cell region portion and a sense cell region portion. At least a part of the element isolation layer is arranged inside of a division portion of the electric field relaxation layer.

公开(公告)号：US09853139B2

公开(公告)日：2017-12-26

申请号：US15124326

申请日：2015-02-10

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

发明人： Hidefumi Takaya ,  Jun Saito ,  Akitaka Soeno ,  Toshimasa Yamamoto ,  Narumasa Soejima

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/12 ,  H01L21/761 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/7811 ,  H01L21/761 ,  H01L29/06 ,  H01L29/0623 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/12 ,  H01L29/408 ,  H01L29/4236 ,  H01L29/66734 ,  H01L29/7813

摘要： A semiconductor device provided herein includes: a fourth region of a p-type being in contact with a lower end of the gate trench; a termination trench provided in the front surface in a range outside the second region; a lower end p-type region of the p-type being in contact with a lower end of the termination trench; a lateral p-type region of the p-type being in contact with a lateral surface of the termination trench on an outer circumferential side, connected to the lower end p-type region, and exposed on the front surface; and a plurality of guard ring regions provided on the outer circumferential side with respect to the lateral p-type region and exposed on the front surface.

公开(公告)号：US20140077253A1

公开(公告)日：2014-03-20

申请号：US13695749

申请日：2011-06-08

申请人： Akitaka Soeno

发明人： Akitaka Soeno

IPC分类号： H01L29/739 ,  H01L29/66

CPC分类号： H01L29/7395 ,  H01L29/0834 ,  H01L29/32 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7397

摘要： A semiconductor device includes a drift layer formed in a semiconductor substrate, and a body layer formed at an upper surface of the semiconductor substrate and located on an upper surface side of the drift layer. The drift layer includes a lifetime control region having a crystal defect density that is equal to or higher than h/2, where h is a maximum value of a crystal defect density of the drift layer that varies in a depth direction of the semiconductor substrate. The lifetime control region is formed by irradiating charged particles to a first conductivity type pre-drift layer including a first resistance layer and a second resistance layer, a resistivity of the second resistance layer being lower than a resistivity of the first resistance layer. At least of a part of the lifetime control region is formed in a range of the second resistance layer.

摘要翻译： 半导体器件包括形成在半导体衬底中的漂移层和形成在半导体衬底的上表面并位于漂移层的上表面侧的体层。 漂移层包括具有等于或高于h / 2的晶体缺陷密度的寿命控制区，其中h是在半导体衬底的深度方向上变化的漂移层的晶体缺陷密度的最大值。 寿命控制区域通过将带电粒子照射到包括第一电阻层和第二电阻层的第一导电型预漂移层而形成，第二电阻层的电阻率低于第一电阻层的电阻率。 寿命控制区域的至少一部分形成在第二电阻层的范围内。

公开(公告)号：US08384211B2

公开(公告)日：2013-02-26

申请号：US12990681

申请日：2009-04-30

申请人： Akitaka Soeno

发明人： Akitaka Soeno

IPC分类号： H01L23/10

CPC分类号： H01L23/473 ,  H01L23/3735 ,  H01L24/34 ,  H01L25/072 ,  H01L2224/83801 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/00 ,  H01L2224/37099

摘要： A semiconductor apparatus includes a first stacked body including a first radiator plate, a first insulating layer, a first conductive layer and a first semiconductor element in this order; a second stacked body including a second radiator plate, a second insulating layer, a second conductive layer and a second semiconductor element in this order and configured to be made of a semiconductor material different from that of the first semiconductor element; and a connecting part configured to electrically connect the first conductive layer and the second conductive layer, wherein the first stacked body and the second stacked body are thermally insulated.

摘要翻译： 半导体装置依次包括：第一层叠体，其包括第一散热板，第一绝缘层，第一导电层和第一半导体元件; 包括第二散热板，第二绝缘层，第二导电层和第二半导体元件的第二堆叠体，并且构造成由与第一半导体元件不同的半导体材料制成; 以及连接部，被配置为电连接所述第一导电层和所述第二导电层，其中所述第一层叠体和所述第二层叠体是绝热的。