公开(公告)号：US06798593B2

公开(公告)日：2004-09-28

申请号：US09814548

申请日：2001-03-22

申请人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi

发明人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi

IPC分类号： G11B509

CPC分类号： H03M13/2957 ,  G11B20/10194 ,  G11B20/1426 ,  G11B20/1833 ,  G11B20/1866 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M13/6325

摘要： A magnetic recording and/or reproducing apparatus which achieves high performance encoding and high efficiency decoding to lower the decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes, in its recording system, an error correction coder 51 for error correction coding input data and an interleaver 52 for scrambling the sequence of data supplied from the error correction coder 51. The magnetic recording and/or reproducing apparatus 50 also includes, in its reproducing system, s modulation and error correction turbo decoder 64 provided with a deinterleaver for scrambling and re-arraying the sequence of the input data such as to restore the sequence of input data re-arrayed by the interleaver 52 to an original bit sequence, an error correction soft decoder for decoding data supplied from the deinterleaver and with a second interleaver for scrambling and re-arraying the sequence of data given as a difference between data output from the error correction soft decoder and data output from the deinterleaver.

摘要翻译： 一种实现高性能编码和高效率解码以降低解码错误率的磁记录和/或再现装置。 磁记录和/或再现装置50在其记录系统中包括用于纠错编码输入数据的纠错编码器51和用于对从纠错编码器51提供的数据序列进行加扰的交织器52.磁记录和/ 或再现装置50在其再现系统中还包括设置有去交织器的调制和纠错turbo解码器64，用于对输入数据的序列进行加扰和重新排列，以便恢复由所述解交织器重新排列的输入数据的序列 交织器52到原始比特序列，纠错软解码器，用于对从解交织器提供的数据进行解码，以及用于第二交织器，用于加扰和重新排列作为从纠错软解码器输出的数据与数据之间的差异的数据序列 从解交织器输出。

公开(公告)号：US07196999B2

公开(公告)日：2007-03-27

申请号：US09814379

申请日：2001-03-21

申请人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi

发明人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi

IPC分类号： G11B5/09

CPC分类号： H03M13/6325 ,  G11B20/10009 ,  G11B20/1426 ,  G11B20/1866 ,  G11B2020/1434 ,  G11B2020/1446 ,  H03M5/14 ,  H03M13/27 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/45 ,  H03M13/6343

摘要： A method and apparatus for recording or reproducing data in which high performance encoding and a high efficiency decoding are realized to lower the decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes, in a recording system, a modulation encoder 52 for modulation encoding input data in a predetermined fashion and an interleaver 53 for interleaving data supplied from the modulation encoder 52 to re-array the data sequence. The magnetic recording and/or reproducing apparatus 50 also includes, in a reproducing system, a first deinterleaver for interleaving the input data for re-arraying the data sequence so that the bit sequence of data re-arrayed by the interleaver 53 will be restored to its original bit sequence, a modulation SISO decoder for modulation decoding data supplied from the first deinterleaver and a second deinterleaver for interleaving data corresponding to a difference value between data output by the modulation SISO decoder and data output by the first deinterleaver to re-array the data sequence of the difference data.

摘要翻译： 用于记录或再现其中实现高性能编码和高效率解码以降低解码错误率的数据的方法和装置。 磁记录和/或再现装置50在记录系统中包括用于以预定方式对输入数据进行调制编码的调制编码器52和用于交织从调制编码器52提供的数据的交织器53以重新排列数据序列。 磁记录和/或再现装置50还包括在再现系统中的第一解交织器，用于交织用于重新排列数据序列的输入数据，使得由交织器53重新排列的数据的位序列将被恢复到 其原始比特序列，用于从第一去交织器提供的调制解码数据的调制SISO解码器和用于对应于由调制SISO解码器输出的数据与由第一解交织器输出的数据之间的差值相对应的数据的第二解交织器，用于重新排列 差异数据的数据序列。

公开(公告)号：US06744580B2

公开(公告)日：2004-06-01

申请号：US09814429

申请日：2001-03-21

申请人： Masayuki Hattori ,  Toshiyuki Miyauchi ,  Jun Murayama

发明人： Masayuki Hattori ,  Toshiyuki Miyauchi ,  Jun Murayama

IPC分类号： G11B509

CPC分类号： H03M13/6325 ,  G11B20/10 ,  H03M13/2972

摘要： A magnetic recording and/or reproducing apparatus performing efficient decoding to lower a decoding error rate. A magnetic recording and/or reproducing apparatus 50 includes a modulation SISO decoder 63 for modulation decoding data modulation-encoded in a predetermined fashion by a modulation coder 52. In the magnetic recording and/or reproducing apparatus 50, the modulation SISO decoder 63 is a soft input soft output (SISO) type modulation decoder fed with a soft input signal and issuing a soft output signal. The modulation SISO decoder 63 is fed with a trellis soft output signal D64 supplied from a trellis SISO decoder 62 to find a soft decision value for an error correction coding data D52 fed to the modulation coder 52 of the recording system to generate a modulated soft decision signal D65. The modulation SISO decoder 63 routes the so-generated modulated soft decision signal D65 to a downstream side error correction soft decoder 64.

摘要翻译： 执行有效解码以降低解码错误率的磁记录和/或再现装置。 磁记录和/或再现装置50包括调制SISO解码器63，用于通过调制编码器52以预定的方式调制对数据进行调制解码。在磁记录和/或再现装置50中，调制SISO解码器63是 软输入软输出（SISO）型调制解码器，输入软输入信号并发出软输出信号。 调制SISO解码器63馈送有从网格SISO解码器62提供的网格软输出信号D64，以找到馈送到记录系统的调制编码器52的纠错编码数据D52的软判决值，以产生调制软判决 信号D65。 调制SISO解码器63将所生成的调制软判决信号D65路由到下游侧纠错软解码器64。

公开(公告)号：US07010051B2

公开(公告)日：2006-03-07

申请号：US09816272

申请日：2001-03-23

申请人： Jun Murayama ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Kouhei Yamamoto ,  Takashi Yokokawa

发明人： Jun Murayama ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Kouhei Yamamoto ,  Takashi Yokokawa

IPC分类号： H04L5/12

CPC分类号： H03M13/29 ,  H03M13/256 ,  H03M13/258 ,  H03M13/2972 ,  H03M13/3988

摘要： Error correction coding and decoding according to a serial concatenated modulation system are carried out under high code rate. A coding apparatus 1 comprises three convolutional coders 10, 30 and 50 for carrying out convolutional operation; two interleavers 20 and 40 for rearranging order of data input; and a multi-value mapping circuit 60 for carrying out mapping of a single point on the basis of a predetermined modulation system. The coding apparatus 1 carries out convolutional operation whose code rate is “⅔” as coding of extrinsic codes by a convolutional coder 10, and carries out convolutional operation whose code rate is “1” as coding of inner codes by a convolutional coder 50, and a multi-value modulation mapping circuit 60 applies mapping to a transmission symbol of a 8 PSK modulation system to output it as a single code transmission symbol.

摘要翻译： 根据串行级联调制方式的纠错编码和解码是以高码率进行的。 编码装置1包括用于进行卷积运算的三个卷积编码器10,30和50; 两个交织器20和40用于重新排列数据输入的顺序; 以及多值映射电路60，用于基于预定的调制系统执行单个点的映射。 编码装置1通过卷积编码器10进行码本为“2/3”的卷积运算，进行卷积编码器10的外部码的编码，并且通过卷积编码器50进行码率为“1”的卷积运算 ，并且多值调制映射电路60将映射应用于8PSK调制系统的发送符号，以将其作为单个码传输符号输出。

公开(公告)号：US06901548B2

公开(公告)日：2005-05-31

申请号：US09821008

申请日：2001-03-29

申请人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi ,  Kouhei Yamamoto ,  Takashi Yokokawa

发明人： Masayuki Hattori ,  Jun Murayama ,  Toshiyuki Miyauchi ,  Kouhei Yamamoto ,  Takashi Yokokawa

IPC分类号： G06F11/10 ,  H03M13/25 ,  H03M13/27 ,  H03M13/29 ,  H03M13/45 ,  H04L1/00 ,  H04L27/00 ,  H04L27/18 ,  H03M13/00

CPC分类号： H03M13/256 ,  H03M13/258 ,  H03M13/2972 ,  H03M13/3988

摘要： To carry out error correction coding and decoding according to a serially concatenated coded modulation system with a small circuit scale and high performance. A coding apparatus 1 is designed so that an interleaver 20 interleaves order of bits so that all weights are coded by a convolutional coder 30 with respect to data comprising a series of 3 bits supplied from a convolutional coder 10; the convolutional coder 30 makes as small as possible the total value of the hamming distance of input bit between passes to be the minimum Euclidean distance with respect to data of 3 bits supplied from the interleaver 20; and a multi-value modulation mapping circuit 40 causes the hamming distance of input bits in the convolutional coder 30 as the distance between signal point on the I/Q plane is smaller to subject data of 3 bits supplied from the convolutional coder 30 to mapping.

摘要翻译： 根据串行级联的编码调制系统，具有小电路规模和高性能，进行纠错编码和解码。 编码装置1被设计成使得交织器20交织比特的顺序，使得所有权重相对于包括从卷积编码器10提供的一系列3比特的数据由卷积编码器30编码; 卷积编码器30相对于从交织器20提供的3比特的数据，尽可能地使输入比特的汉明距离的总值为最小欧几里得距离; 并且多值调制映射电路40使卷积编码器30中的输入比特的汉明距离随着I / Q平面上的信号点之间的距离变小，从卷积编码器30提供的3比特数据映射。

公开(公告)号：US06826722B2

公开(公告)日：2004-11-30

申请号：US09814280

申请日：2001-03-21

申请人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Jun Murayama

发明人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Jun Murayama

IPC分类号： G06F1100

CPC分类号： G11B20/10 ,  H03M13/39

摘要： A magnetic recording and/or reproducing apparatus in which the decoding error rate is to be lowered through realization of the high-performance encoding and the high efficiently decoding. To this end, a magnetic recording and/or reproducing apparatus 50 includes, in its recording system, an error correction coder 51 for error correction encoding input data, an interleaver 52 for interleaving data supplied from the error correction coder 51 for re-arraying the data sequence, a modulation encoder 53 for modulation encoding the data from the interleaver 52 in a predetermined fashion and an interleaver 54 for interleaving the data from the modulation encoder 53 for re-arraying the data sequence. The magnetic recording and/or reproducing apparatus 50 also includes, in its reproduction system, a channel, modulation and error correction turbo decoder 64 formed by concatenation of an error correction soft decoder and a modulation decoder for decoding the input data with the interposition of two deinterleavers and two interleavers.

摘要翻译： 一种通过实现高性能编码和高效解码来降低解码错误率的磁记录和/或再现装置。 为此，磁记录和/或再现装置50在其记录系统中包括用于对输入数据进行纠错编码的纠错编码器51，用于交错从纠错编码器51提供的数据的交织器52用于重新排列 数据序列，用于以预定方式对来自交织器52的数据进行调制编码的调制编码器53和用于对来自调制编码器53的数据进行交织以重新排列数据序列的交织器54。 磁记录和/或再现装置50在其再现系统中还包括通道，调制和纠错turbo解码器64，其通过错误校正软解码器和调制解码器的级联形成，该调制解码器用于对输入数据进行解码以插入两个 去交织器和两个交织器。

公开(公告)号：US07051270B2

公开(公告)日：2006-05-23

申请号：US10110670

申请日：2001-08-20

申请人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Kouhei Yamamoto ,  Takashi Yokokawa

发明人： Toshiyuki Miyauchi ,  Masayuki Hattori ,  Kouhei Yamamoto ,  Takashi Yokokawa

IPC分类号： H03M13/03 ,  H03M13/00

CPC分类号： H03M13/3905 ,  H03M13/258 ,  H03M13/27 ,  H03M13/29 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/6337 ,  H03M13/6577 ,  H03M13/658

摘要： A decoder that receives, as input, probability information AMP/CR×yt. This probability information is obtained by dividing a channel value obtained by multiplication of received value yt and a predetermined coefficient AMP by the first additive coefficient CR for regulating the amplitude of the received value yt and the probability information 1/CA×APPt obtained by multiplying the a priori probability information APPt by the reciprocal of the second additive coefficient CA for regulating the amplitude of the a priori probability information APPt to a soft-output decoding circuit. The soft-output decoding circuit, which may be a large scale intergrated circuit, generates log soft-output CI×Iλt and/or external information 1/CA×EXt using additive coefficients for regulating the amplitude of arithmetic operations in the inside of the soft-output decoding circuit.

摘要翻译： 接收作为输入的概率信息的解码器。 该概率信息是通过将通过接收值y T 与预定系数AMP乘以获得的信道值除以第一加法系数C SUB来获得的，以用于调节 通过将先验概率信息APP＆lt; T＆gt;＆lt;＆gt;＆lt; T＆gt;获得的概率信息1 / C A xAPP＆lt; SUB>通过第二加法系数C A A A的倒数，用于将先验概率信息APP 的振幅调整到软输出解码电路。 可以是大规模集成电路的软输出解码电路生成日志软输出C 1和/或外部信息1 / C＆lt; 使用用于调节软输出解码电路内部的算术运算幅度的加法系数的XEXT。

公开(公告)号：US20060015791A1

公开(公告)日：2006-01-19

申请号：US10523452

申请日：2004-05-28

申请人： Atsushi Kikuchi ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Kazuo Watanabe ,  Makiko Kan

发明人： Atsushi Kikuchi ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Kazuo Watanabe ,  Makiko Kan

IPC分类号： H03M13/00

CPC分类号： H03M13/2906 ,  G11B20/18 ,  G11B20/1866 ,  G11B2020/1836 ,  H03M13/1111 ,  H03M13/1191 ,  H03M13/15 ,  H03M13/1515 ,  H03M13/152 ,  H03M13/2936

摘要： The present invention relates to a decoding method and a decoder, a program, a recording-and-reproducing apparatus and a method, and a reproducing apparatus and a method that are suitable for decoding encoded data encoded by using a linear code on ring R. A low-density processing unit performs parity-check-matrix low-density processing, performs linear combination for rows of a parity check matrix included in an obtained reception word, and generates a parity check matrix according to the linear-combination result, thereby reducing the density of the parity check matrix used for decoding, at step S21. Then, at step S22, an LDPC decoding unit performs decoding by using a sum product algorithm (SPA) by using the parity check matrix whose density is reduced through the processing performed at step S21. Where the processing at step S22 is finished, the LDPC decoding unit finishes decoding for the reception word. The present invention can be used for an error-correction system.

摘要翻译： 本发明涉及适用于对通过使用环R上的线性码编码的编码数据进行解码的解码方法和解码器，程序，记录和再现装置和方法以及再现装置和方法。 低密度处理单元执行奇偶校验矩阵低密度处理，对获得的接收字中包含的奇偶校验矩阵的行进行线性组合，并根据线性组合结果生成奇偶校验矩阵，从而减少 在步骤S21中用于解码的奇偶校验矩阵的密度。然后，在步骤S22，LDPC解码单元通过使用通过使用密度减小的奇偶校验矩阵的和乘积算法（SPA）来执行解码 在步骤S2执行的处理。在步骤S22的处理完成的情况下，LDPC解码单元完成接收字的解码。 本发明可以用于纠错系统。

公开(公告)号：US06360346B1

公开(公告)日：2002-03-19

申请号：US09140005

申请日：1998-08-26

申请人： Toshiyuki Miyauchi ,  Masayuki Hattori

发明人： Toshiyuki Miyauchi ,  Masayuki Hattori

IPC分类号： G11C2900

CPC分类号： G11C29/42

摘要： A storage unit is provided which is capable of preventing the occurrence of readout errors even if two or more errors arise within a code, and a storage unit checking method is offered which can improve the productivity. Write data produced by BCH-encoding and compacting data s1 inputted into a flash memory, capable of correcting two errors within a code in an encoder, is written in a cell array. Data read out from the cell array 3 is error-corrected and decoded in an error correction/encoder to generate output data. In the check to be made at manufacturing (or putting on the market), examination data written in advance is successively read out by one block so that the errors within each code is counted. If the number of errors assumes 1 or less, that code is subjected to error correction, whereas the block including a code whose error number is 2 or more is treated as a defective block. The acceptance or failure is determined depending upon, for example, whether the rate of the number of defective blocks to the total number of blocks is below or not less than 1%.

摘要翻译： 提供了一种存储单元，其能够防止在代码中出现两个或更多个错误的情况下发生读出错误，并且提供可以提高生产率的存储单元检查方法。 写入通过BCH编码产生的数据和输入到闪存中的压缩数据s1，其能够校正编码器中的代码内的两个错误，被写入单元阵列中。 从单元阵列3读出的数据在误差校正/编码器中进行纠错和解码以产生输出数据。 在制造（或投放市场）的检查中，预先写入的检查数据被一个块连续地读出，从而对每个代码中的错误进行计数。 如果错误数假定为1或更小，则该代码进行错误校正，而包含错误号为2或更大的代码的块被视为缺陷块。 接收或故障根据例如有缺陷块的数量与总块数的比率是低于还是不小于1％来确定。

公开(公告)号：US08437426B2

公开(公告)日：2013-05-07

申请号：US12567856

申请日：2009-09-28

申请人： Hidetoshi Kawauchi ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Takashi Yokokawa ,  Kazuhiro Shimizu ,  Kazuhisa Funamoto

发明人： Hidetoshi Kawauchi ,  Masayuki Hattori ,  Toshiyuki Miyauchi ,  Takashi Yokokawa ,  Kazuhiro Shimizu ,  Kazuhisa Funamoto

IPC分类号： H04B1/38 ,  H04N7/12 ,  H04L27/00

CPC分类号： H04L27/2662 ,  H04L25/0232 ,  H04L25/03159 ,  H04L27/2656 ,  H04L27/2665

摘要： Disclosed herein is a receiving apparatus including: first to third position determination sections configured to determine the start position of an FFT interval which serves as a signal interval targeted for FFT by an FFT section; a selection section configured to select one of those start positions of the FFT interval which are determined by the first through the third position determination section; and the FFT section configured to perform FFT on the OFDM time domain signal by regarding the start position selected by the selection section as the start position of the FFT interval in order to generate the first OFDM frequency domain signal.

摘要翻译： 本发明公开了一种接收装置，包括：第一至第三位置确定部分，被配置为确定FFT间隔的起始位置，其作为由FFT部分进行FFT的信号间隔; 选择部，被配置为选择由所述第一至第三位置确定部确定的所述FFT间隔的那些起始位置之一; FFT部，被配置为通过将由选择部选择出的开始位置作为FFT间隔的开始位置，对OFDM时域信号进行FFT，以生成第一OFDM频域信号。