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    Memristor-protection integrated circuit and method for protection of a memristor during switching
    1.
    发明授权
    Memristor-protection integrated circuit and method for protection of a memristor during switching 有权
    防转发保护集成电路及保护方法

    公开(公告)号：US08111494B2

    公开(公告)日：2012-02-07

    申请号：US12695995

    申请日：2010-01-28

    申请人： Matthew D. Pickett ,  John Paul Strachan ,  Muhammad Shakeel Qureshi

    发明人： Matthew D. Pickett ,  John Paul Strachan ,  Muhammad Shakeel Qureshi

    IPC分类号： H02H9/08 ,  H02H3/08 ,  H02H9/02 ,  H02H9/00

    CPC分类号： G11C13/0059 ,  G11C13/0002

    摘要： A memristor-protection integrated circuit. The memristor-protection integrated circuit includes a first current-bias circuit, a second current-bias circuit, an inverter, and a current limiter. The first and second current-bias circuits are configured to be coupled to first and second power-supply rails, respectively. The inverter is coupled to the first current-bias circuit and to the second current-bias circuit, and is configured to couple at least one memristor to at least one of the first current-bias circuit and the second current-bias circuit in response to an input signal applied to the inverter. The current limiter is coupled to the first current-bias circuit and coupled to the second current-bias circuit, and is configured to limit current flowing through the memristor.

    摘要翻译： 忆阻器保护集成电路。 避雷器保护集成电路包括第一电流偏置电路，第二电流偏置电路，反相器和限流器。 第一和第二电流偏置电路分别被配置为耦合到第一和第二电源轨。 反相器耦合到第一电流偏置电路和第二电流偏置电路，并且被配置为响应于第一电流偏置电路和第二电流偏置电路将至少一个阻电器耦合到第一电流偏置电路和第二电流偏置电路中的至少一个 施加到逆变器的输入信号。 电流限制器耦合到第一电流偏置电路并且耦合到第二电流偏置电路，并且被配置为限制流过忆阻器的电流。

    MEMRISTOR-PROTECTION INTEGRATED CIRCUIT AND METHOD FOR PROTECTION OF A MEMRISTOR DURING SWITCHING
    2.
    发明申请
    MEMRISTOR-PROTECTION INTEGRATED CIRCUIT AND METHOD FOR PROTECTION OF A MEMRISTOR DURING SWITCHING 有权
    仪表保护集成电路及切换期间保护仪表的方法

    公开(公告)号：US20110181347A1

    公开(公告)日：2011-07-28

    申请号：US12695995

    申请日：2010-01-28

    申请人： Matthew D. Pickett ,  John Paul Strachan ,  Muhammad Shakeel Qureshi

    发明人： Matthew D. Pickett ,  John Paul Strachan ,  Muhammad Shakeel Qureshi

    IPC分类号： G05F1/10

    CPC分类号： G11C13/0059 ,  G11C13/0002

    摘要： A memristor-protection integrated circuit. The memristor-protection integrated circuit includes a first current-bias circuit, a second current-bias circuit, an inverter, and a current limiter. The first and second current-bias circuits are configured to be coupled to first and second power-supply rails, respectively. The inverter is coupled to the first current-bias circuit and to the second current-bias circuit, and is configured to couple at least one memristor to at least one of the first current-bias circuit and the second current-bias circuit in response to an input signal applied to the inverter. The current limiter is coupled to the first current-bias circuit and coupled to the second current-bias circuit, and is configured to limit current flowing through the memristor.

    摘要翻译： 忆阻器保护集成电路。 避雷器保护集成电路包括第一电流偏置电路，第二电流偏置电路，反相器和限流器。 第一和第二电流偏置电路分别被配置为耦合到第一和第二电源轨。 反相器耦合到第一电流偏置电路和第二电流偏置电路，并且被配置为响应于第一电流偏置电路和第二电流偏置电路将至少一个阻电器耦合到第一电流偏置电路和第二电流偏置电路中的至少一个 施加到逆变器的输入信号。 电流限制器耦合到第一电流偏置电路并且耦合到第二电流偏置电路，并且被配置为限制流过忆阻器的电流。

    Memristive Junction with Intrinsic Rectifier
    5.
    发明申请
    Memristive Junction with Intrinsic Rectifier 有权
    具有内在整流器的忆阻结

    公开(公告)号：US20120032134A1

    公开(公告)日：2012-02-09

    申请号：US13258499

    申请日：2009-07-10

    申请人： Jianhua Yang ,  John Paul Strachan ,  Matthew D. Pickett

    发明人： Jianhua Yang ,  John Paul Strachan ,  Matthew D. Pickett

    IPC分类号： H01L45/00 ,  H01L21/02

    CPC分类号： H01L29/24 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/73 ,  H01L27/101 ,  H01L27/2463 ,  H01L29/8615 ,  H01L29/872 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147

    摘要： A memristive junction (400) can comprise a first electrode (102) and second electrode (104), with a memristive region (106) situated between them. The memristive region is configured to switch between two activation states via a switching voltage (118) applied between the electrodes. The activation state can be ascertained by application of a reading voltage between the first electrode and second electrode. The junction further comprises a rectifier region situated at an interface (420) between the first electrode and the memristive region, and comprising a layer (402) of temperature-responsive transition material that is substantially conductive at the switching voltage and substantially resistive at the reading voltage.

    摘要翻译： 忆阻接头（400）可以包括第一电极（102）和第二电极（104），其间具有位于它们之间的忆阻区（106）。 忆阻区被配置为经由施加在电极之间的开关电压（118）在两个激活状态之间切换。 可以通过在第一电极和第二电极之间施加读取电压来确定激活状态。 连接点还包括位于第一电极和忆阻区域之间的界面（420）处的整流器区域，并且包括温度响应性过渡材料层（402），其在开关电压下基本上是导电的，并且在读数时基本上是电阻的 电压。

    Memristive programmable frequency source and method
    7.
    发明授权
    Memristive programmable frequency source and method 有权
    记忆可编程频率源和方法

    公开(公告)号：US08212621B2

    公开(公告)日：2012-07-03

    申请号：US12916485

    申请日：2010-10-29

    申请人： John Paul Strachan ,  Philip J Kuekes ,  Matthew D. Pickett

    发明人： John Paul Strachan ,  Philip J Kuekes ,  Matthew D. Pickett

    IPC分类号： H03L7/00

    CPC分类号： H03B7/02

    摘要： A frequency source and a method of frequency generation employ a memristive negative differential resistance (M-NDR) voltage controlled oscillator (VCO). The frequency source includes a first M-NDR VCO of a plurality of memristive VCOs to provide a first signal having a first signal frequency. The frequency source further includes a second M-NDR VCO of the plurality to provide a second signal having a second signal frequency. The first and second M-NDR VCOs are interconnected with the plurality of memristive VCOs. The first and second M-NDR VCOs have independent programmable states and are connected to a common output of the frequency source. The method includes providing an M-NDR VCOs, where each M-NDR VCO includes an M-NDR device connected in parallel with a capacitance, and applying a bias voltage to activate a selected M-NDR VCO of the plurality to produce a frequency output.

    摘要翻译： 频率源和频率发生方法采用忆阻负差分电阻（M-NDR）压控振荡器（VCO）。 频率源包括多个忆阻VCO的第一M-NDR VCO以提供具有第一信号频率的第一信号。 频率源还包括多个第二M-NDR VCO以提供具有第二信号频率的第二信号。 第一和第二M-NDR VCO与多个忆阻VCO互连。 第一和第二M-NDR VCO具有独立的可编程状态，并连接到频率源的公共输出。 该方法包括提供M-NDR VCO，其中每个M-NDR VCO包括与电容并联连接的M-NDR设备，以及施加偏置电压以激活多个选定的M-NDR VCO以产生频率输出 。

    MEMRISTIVE PROGRAMMABLE FREQUENCY SOURCE AND METHOD
    8.
    发明申请
    MEMRISTIVE PROGRAMMABLE FREQUENCY SOURCE AND METHOD 有权
    可编程可编程频率源和方法

    公开(公告)号：US20120105159A1

    公开(公告)日：2012-05-03

    申请号：US12916485

    申请日：2010-10-29

    申请人： John Paul Strachan ,  Philip J. Kuekes ,  Matthew D. Pickett

    发明人： John Paul Strachan ,  Philip J. Kuekes ,  Matthew D. Pickett

    IPC分类号： H03L7/00

    CPC分类号： H03B7/02

    摘要： A frequency source and a method of frequency generation employ a memristive negative differential resistance (M-NDR) voltage controlled oscillator (VCO). The frequency source includes a first M-NDR VCO of a plurality of memristive VCOs to provide a first signal having a first signal frequency. The frequency source further includes a second M-NDR VCO of the plurality to provide a second signal having a second signal frequency. The first and second M-NDR VCOs are interconnected with the plurality of memristive VCOs. The first and second M-NDR VCOs have independent programmable states and are connected to a common output of the frequency source. The method includes providing an M-NDR VCOs, where each M-NDR VCO includes an M-NDR device connected in parallel with a capacitance, and applying a bias voltage to activate a selected M-NDR VCO of the plurality to produce a frequency output.

    摘要翻译： 频率源和频率发生方法采用忆阻负差分电阻（M-NDR）压控振荡器（VCO）。 频率源包括多个忆阻VCO的第一M-NDR VCO以提供具有第一信号频率的第一信号。 频率源还包括多个第二M-NDR VCO以提供具有第二信号频率的第二信号。 第一和第二M-NDR VCO与多个忆阻VCO互连。 第一和第二M-NDR VCO具有独立的可编程状态，并连接到频率源的公共输出。 该方法包括提供M-NDR VCO，其中每个M-NDR VCO包括与电容并联连接的M-NDR设备，以及施加偏置电压以激活多个选定的M-NDR VCO以产生频率输出 。

    Memristive junction with intrinsic rectifier
    9.
    发明授权
    Memristive junction with intrinsic rectifier 有权
    具有本征整流器的忆阻结

    公开(公告)号：US08710483B2

    公开(公告)日：2014-04-29

    申请号：US13258499

    申请日：2009-07-10

    申请人： Jianhua Yang ,  John Paul Strachan ,  Matthew D. Pickett

    发明人： Jianhua Yang ,  John Paul Strachan ,  Matthew D. Pickett

    IPC分类号： H01L45/00

    CPC分类号： H01L29/24 ,  G11C13/0007 ,  G11C13/003 ,  G11C2213/73 ,  H01L27/101 ,  H01L27/2463 ,  H01L29/8615 ,  H01L29/872 ,  H01L45/08 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/146 ,  H01L45/147

    摘要： A memristive junction (400) can comprise a first electrode (102) and second electrode (104), with a memristive region (106) situated between them. The memristive region is configured to switch between two activation states via a switching voltage (118) applied between the electrodes. The activation state can be ascertained by application of a reading voltage between the first electrode and second electrode. The junction further comprises a rectifier region situated at an interface (420) between the first electrode and the memristive region, and comprising a layer (402) of temperature-responsive transition material that is substantially conductive at the switching voltage and substantially resistive at the reading voltage.

    摘要翻译： 忆阻接头（400）可以包括第一电极（102）和第二电极（104），其间具有位于它们之间的忆阻区（106）。 忆阻区被配置为经由施加在电极之间的开关电压（118）在两个激活状态之间切换。 可以通过在第一电极和第二电极之间施加读取电压来确定激活状态。 连接点还包括位于第一电极和忆阻区域之间的界面（420）处的整流器区域，并且包括温度响应性过渡材料层（402），其在开关电压下基本上是导电的，并且在读数时基本上是电阻的 电压。