摘要:
A cleaving tool provides pressurized gas to the edge of a substrate to cleave the substrate at a selected interface. A substrate, such as a bonded substrate, is loaded into the cleaving tool, and two halves of the tool are brought together to apply a selected pressure to the substrate. A compliant pad of selected elastic resistance provides support to the substrate while allowing the substrate to expand during the cleaving process. Bringing the two halves of the tool together also compresses an edge seal against the perimeter of the substrate. A thin tube connected to a high-pressure gas source extends through the edge seal and provides a burst of gas to separate the substrate into at least two sheets. In a further embodiment, the perimeter of the substrate is struck with an edge prior to applying the gas pressure.
摘要:
A cleaving tool provides pressurized gas to the edge of a substrate in combination with a sharpened edge to cleave the substrate at a selected interface. The edge of the tool is tapped against the perimeter of a substrate, such as a bonded substrate, and a burst of gas pressure is then applied at approximately the point of contact with the edge of the tool. The combination of mechanical force and gas pressure separates the substrate into two halves at a selected interface, such as a weakened layer in a donor wafer.
摘要:
A cleaving tool provides pressurized gas to the edge of a substrate in combination with a sharpened edge to cleave the substrate at a selected interface. The edge of the tool is tapped against the perimeter of a substrate, such as a bonded substrate, and a burst of gas pressure is then applied at approximately the point of contact with the edge of the tool. The combination of mechanical force and gas pressure separates the substrate into two halves at a selected interface, such as a weakened layer in a donor wafer.
摘要:
A cleaving tool provides pressurized gas to the edge of a substrate to cleave the substrate at a selected interface. A substrate, such as a bonded substrate, is loaded into the cleaving tool, and two halves of the tool are brought together to apply a selected pressure to the substrate. A compliant pad of selected elastic resistance provides support to the substrate while allowing the substrate to expand during the cleaving process. Bringing the two halves of the tool together also compresses an edge seal against the perimeter of the substrate. A thin tube connected to a high-pressure gas source extends through the edge seal and provides a burst of gas to separate the substrate into at least two sheets. In a further embodiment, the perimeter of the substrate is struck with an edge prior to applying the gas pressure.
摘要:
High-density semiconductor memory utilizing metal control gate structures and air gap electrical isolation between discrete devices in these types of structures are provided. During gate formation and definition, etching the metal control gate layer(s) is separated from etching the charge storage layer to form protective sidewall spacers along the vertical sidewalls of the metal control gate layer(s). The sidewall spacers encapsulate the metal control gate layer(s) while etching the charge storage material to avoid contamination of the charge storage and tunnel dielectric materials. Electrical isolation is provided, at least in part, by air gaps that are formed in the row direction and/or air gaps that are formed in the column direction.
摘要:
A semiconductor device including a plurality of copper interconnects. At least a first portion of the plurality of copper interconnects has a meniscus in a top surface. The semiconductor device also includes a plurality of air gaps, wherein each air gap of the plurality of air gaps is located between an adjacent pair of at least the first portion of the plurality of bit lines.
摘要:
A method for fabricating a non-volatile storage element. The method comprises forming a layer of polysilicon floating gate material over a substrate and forming a layer of nitride at the surface of the polysilicon floating gate material. Floating gates are formed from the polysilicon floating gate material. Individual dielectric caps are formed from the nitride such that each individual nitride dielectric cap is self-aligned with one of the plurality of floating gates. An inter-gate dielectric layer is formed over the surface of the dielectric caps and the sides of the floating gates. Control gates are then formed with the inter-gate dielectric layer separating the control gates from the floating gates. The layer of nitride may be formed using SPA (slot plane antenna) nitridation. The layer of nitride may be formed prior to or after etching of the polysilicon floating gate material to form floating gates.
摘要:
A non-volatile memory fabrication process includes the formation of a complete memory cell layer stack before isolation region formation. The memory cell layer stack includes an additional place holding control gate layer. After forming the layer stack columns, the additional control gate layer will be incorporated between an overlying control gate layer and underlying intermediate dielectric layer. The additional control gate layer is self-aligned to isolation regions between columns while the overlying control gate layer is etched into lines for contact to the additional control gate layer. In one embodiment, the placeholder control gate layer facilitates a contact point to the overlying control gate layer such that contact between the control gate layers and the charge storage layer is not required for select gate formation.
摘要:
A method of fabricating a memory system is disclosed that includes a set of non-volatile storage elements. The method includes forming a floating gate having a top and at least two sides. A dielectric cap is formed at the top of the floating gate. An inter-gate dielectric layer is formed around the at least two sides of the floating gate and over the top of the dielectric cap. A control gate is formed over the top of the floating gate, the inter-gate dielectric layer separates the control gate from the floating gate. In one aspect, forming the dielectric cap includes implanting oxygen in the top of the floating gate and heating the floating gate to form the dielectric cap from the implanted oxygen and silicon from which the floating gate was formed.
摘要:
Nanostructure-based charge storage regions are included in non-volatile memory devices and integrated with the fabrication of select gates and peripheral circuitry. One or more nanostructure coatings are applied over a substrate at a memory array area and a peripheral circuitry area. Various processes for removing the nanostructure coating from undesired areas of the substrate, such as target areas for select gates and peripheral transistors, are provided. One or more nanostructure coatings are formed using self-assembly based processes to selectively form nanostructures over active areas of the substrate in one example. Self-assembly permits the formation of discrete lines of nanostructures that are electrically isolated from one another without requiring patterning or etching of the nanostructure coating.