公开(公告)号：US4725561A

公开(公告)日：1988-02-16

申请号：US882901

申请日：1986-06-05

申请人： Michel Haond ,  Jean-Pierre Colinge ,  Daniel Bensahel ,  Didier Dutartre

发明人： Michel Haond ,  Jean-Pierre Colinge ,  Daniel Bensahel ,  Didier Dutartre

IPC分类号： H01L21/20 ,  H01L21/762 ,  H01L21/263 ,  H01L21/76 ,  H01L21/95

CPC分类号： H01L21/76264 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02667 ,  H01L21/76272

摘要： This process consists of producing patterns (17) of an insulating material on a monocrystalline silicon substrate (12), depositing on the complete structure an amorphous or polycrystalline silicon film (26), covering the latter with a layer (28) of an encapsulating material, carrying out a heat treatment on the structure obtained serving to vertically embed in substrate (12) the insulating material patterns (17) and forming above the latter a monocrystalline silicon layer (33), eliminating the encapsulating material layer (28) and etching the monocrystalline silicon layer obtained (33), so as to form said islands (34).

摘要翻译： PCT No.PCT / FR85 / 00270 Sec。 371日期：1986年6月5日 102（e）日期1986年6月5日PCT归档1985年10月1日PCT公布。 出版物WO86 / 02198 日期为1986年4月10日。该方法包括在单晶硅衬底（12）上产生绝缘材料的图案（17），在完整结构上沉积无定形或多晶硅膜（26），用层 （28），对用于垂直地嵌入基板（12）中的绝缘材料图案（17）获得的结构进行热处理，并在其上形成单晶硅层（33），消除封装材料 层（28），并蚀刻获得的单晶硅层（33），以形成所述岛（34）。

公开(公告)号：US4678538A

公开(公告)日：1987-07-07

申请号：US853906

申请日：1986-04-21

申请人： Michel Haond ,  Daniel Bensahel ,  Didier Dutartre

发明人： Michel Haond ,  Daniel Bensahel ,  Didier Dutartre

IPC分类号： H01L21/20 ,  C30B13/34 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： C30B13/34

摘要： Process for the production of an oriented monocrystalline silicon film with localized defects on an insulating support.This process consists of covering a monocrystalline silicon support of orientation (100) with a SiO.sub.2 layer, producing in the latter a configuration having in the form of oriented (100) parallel insulating strips, an alternation of overhanging parts and recessed parts carrying out the etching of the SiO.sub.2 layer in order to locally form at the ends of said layer at least one opening, said etching being continued until the substrate is exposed, depositing on the etched SiO.sub.2 layer a silicon film, covering the silicon film with an encapsulating layer, carrying out a heat treatment of the structure obtained in order to recrystallize the silicon film in monocrystalline form with the same orientation as the substrate and eliminating the encapsulating layer.

摘要翻译： 用于在绝缘支撑件上制造具有局部缺陷的取向单晶硅膜的方法。 该方法包括用SiO 2层覆盖取向（100）的单晶硅支撑体，后者产生具有取向（100）平行绝缘条形式的构型，突出部分的交替和进行蚀刻的凹陷部分 的SiO 2层，以在所述层的端部局部形成至少一个开口，所述蚀刻继续进行，直到基板被暴露，在蚀刻的SiO 2层上沉积硅膜，用封装层覆盖硅膜，承载 对获得的结构进行热处理，以便以与衬底相同的取向以单晶形式重结晶硅膜并消除封装层。

公开(公告)号：US06537894B2

公开(公告)日：2003-03-25

申请号：US09920315

申请日：2001-08-01

申请人： Thomas Skotnicki ,  Michel Haond ,  Didier Dutartre

发明人： Thomas Skotnicki ,  Michel Haond ,  Didier Dutartre

IPC分类号： H01L2176

CPC分类号： H01L21/76264 ,  H01L21/76283

摘要： Processes are provided for fabricating a substrate having a silicon-on-insulator (SOI) or silicon-on-nothing (SON) architecture, which are applicable to the manufacture of semiconductor devices, especially transistors such as those of the MOS, CMOS, BICMOS, and HCMOS types. In the fabrication processes, a multilayer stack is grown on a substrate by non-selective full-wafer epitaxy. The multilayer stack includes a silicon layer on a Ge or SiGe layer. Active regions are defined and masked, and insulating pads are formed so as to be located around the perimeter of each of the active regions at predetermined intervals and placed against the sidewalls of the active regions. The insulating trenches are etched, and the SiGe or Ge layer is laterally etched so as to form an empty tunnel under the silicon layer. The trenches are filled with a dielectric. In the case of an SOI archiutecture, the tunnel is filled with a dielectric.

公开(公告)号：US5252181A

公开(公告)日：1993-10-12

申请号：US808745

申请日：1991-12-17

申请人： Didier Dutartre ,  Daniel Bensahel ,  Jorge L. Regolini

发明人： Didier Dutartre ,  Daniel Bensahel ,  Jorge L. Regolini

IPC分类号： B08B7/00 ,  C23C14/02 ,  C23F4/00 ,  C23G5/00 ,  H01L21/306 ,  B44C1/22

CPC分类号： H01L21/02046 ,  B08B7/0035 ,  C23C14/022 ,  C23F4/00

摘要： Method for cleaning, with plasma, the surface of a substrate before another treatment, consisting:in a first cleaning step, in negatively polarizing the substrate and in subjecting it to an argon plasma, andin a second cleaning step, in subjecting the pretreated substrate to a hydrogen plasma, in order to ensure an efficient cleaning of the surface of the substrate.Application to the prior cleaning of a silicon substrate intended to receive an epitaxy.

摘要翻译： 用于在另一处理之前用等离子体清洗基板的表面的方法包括：在第一清洁步骤中，使基板负极化并使其经受氩等离子体，并且在第二清洁步骤中，对经预处理的基板 到氢等离子体，以确保有效地清洁基底的表面。 适用于预先清洁旨在接收外延的硅衬底。

公开(公告)号：US07892927B2

公开(公告)日：2011-02-22

申请号：US11725160

申请日：2007-03-16

申请人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

发明人： Stephane Monfray ,  Thomas Skotnicki ,  Didier Dutartre ,  Alexandre Talbot

IPC分类号： H01L21/336

CPC分类号： H01L29/78684 ,  H01L29/66628 ,  H01L29/66772

摘要： A transistor including a germanium-rich channel. The germanium-rich channel is produced by oxidation of the silicon contained in the silicon-germanium intermediate layer starting from the lower surface of the said intermediate layer. The germanium atoms are therefore caused to migrate towards the upper surface of the silicon-germanium intermediate layer, and are stopped by the gate insulating layer. The migration of the atoms during the oxidation step is thus less prejudicial to the performance of the transistor, since the gate insulator of the transistor has already been produced and is not modified during this step. The migration of the germanium atoms towards the gate insulator, which is immobile, leads to a limitation of the surface defects between the channel and the insulator.

摘要翻译： 包括富含锗的通道的晶体管。 通过从所述中间层的下表面开始的硅 - 锗中间层中包含的硅的氧化产生富锗的通道。 因此锗原子迁移到硅 - 锗中间层的上表面，并被栅极绝缘层阻挡。 因此，在氧化步骤期间原子的迁移对晶体管的性能的影响较小，因为晶体管的栅极绝缘体已经被制造并且在该步骤期间不被修改。 锗原子向固定的栅极绝缘体的迁移导致通道和绝缘体之间的表面缺陷的限制。

公开(公告)号：US20070190754A1

公开(公告)日：2007-08-16

申请号：US11704638

申请日：2007-02-09

申请人： Didier Dutartre ,  Nicolas Loubet ,  Alexandre Talbot

发明人： Didier Dutartre ,  Nicolas Loubet ,  Alexandre Talbot

IPC分类号： H01L21/20

CPC分类号： H01L29/66772 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/02639

摘要： A method for forming a single-crystal semiconductor layer portion above a hollowed area, including growing by selective epitaxy on an active single-crystal semiconductor region a sacrificial single-crystal semiconductor layer and a single-crystal semiconductor layer, and removing the sacrificial layer. The epitaxial growth is performed while the active region is surrounded with a raised insulating layer and the removal of the sacrificial single-crystal semiconductor layer is performed through an access resulting from an at least partial removal of the raised insulating layer.

摘要翻译： 一种用于在中空区域上方形成单晶半导体层部分的方法，包括通过牺牲单晶半导体层和单晶半导体层在活性单晶半导体区域上的选择性外延生长，以及去除牺牲层。 在有源区域被凸起的绝缘层围绕的同时进行外延生长，并且通过由至少部分去除凸起的绝缘层获得的访问来执行牺牲单晶半导体层的去除。

公开(公告)号：US06642108B2

公开(公告)日：2003-11-04

申请号：US10273925

申请日：2002-10-18

申请人： Thomas Skotnicki ,  Didier Dutartre ,  Pascal Ribot ,  Maryse Paoli ,  Richard Fournel

发明人： Thomas Skotnicki ,  Didier Dutartre ,  Pascal Ribot ,  Maryse Paoli ,  Richard Fournel

IPC分类号： H01L21336

CPC分类号： H01L29/66825 ,  B82Y10/00 ,  H01L21/28273 ,  H01L29/42336

摘要： A non-volatile memory includes a floating gate extending in a substrate between source and drain regions. A channel region may be confined by two insulating layers. The invention is particularly applicable to EPROM, EEPROM, Flash and single-electron memories using CMOS technology.

公开(公告)号：US06218723B1

公开(公告)日：2001-04-17

申请号：US09390862

申请日：1999-09-03

申请人： Philippe Delpech ,  Etienne Robilliart ,  Didier Dutartre

发明人： Philippe Delpech ,  Etienne Robilliart ,  Didier Dutartre

IPC分类号： H01L2943

CPC分类号： H01L28/40

摘要： A capacitor integrated on a silicon substrate includes a first electrode made of highly doped polysilicon, a thin silicon oxide layer, a second electrode made of polysilicon and a silicide layer covering the second electrode. The second electrode has a high dopant concentration at its interface with the silicon oxide layer and a low or medium dopant concentration at its interface with the silicide layer.

摘要翻译： 集成在硅衬底上的电容器包括由高掺杂多晶硅制成的第一电极，薄氧化硅层，由多晶硅制成的第二电极和覆盖第二电极的硅化物层。 第二电极在其与氧化硅层的界面处具有高掺杂剂浓度，并且在其与硅化物层的界面处具有低或中等掺杂剂浓度。

公开(公告)号：US6132806A

公开(公告)日：2000-10-17

申请号：US106571

申请日：1998-06-29

申请人： Didier Dutartre

发明人： Didier Dutartre

IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L29/49 ,  C23C16/24

CPC分类号： H01L29/4966 ,  H01L21/2807

摘要： The present invention relates to a method of formation of an Si.sub.1-x Ge.sub.x MOS transistor gate where x is higher than 50%, on an silicon oxide gate insulator layer, consisting of depositing an Si.sub.1-y Ge.sub.y layer of thickness lower than 10 nm, where 0 50%. The desired thickness ranges, for example, between 20 nm and 200 nm. x and z range, for example, between 80% and 90%.

摘要翻译： 本发明涉及一种在氧化硅栅极绝缘体层上形成x高于50％的Si1-xGex MOS晶体管栅极的方法，该方法包括沉积厚度低于10nm的Si1-yGey层，其中0 50％。 期望的厚度范围例如在20nm和200nm之间。 x和z范围，例如在80％和90％之间。

公开(公告)号：US08158495B2

公开(公告)日：2012-04-17

申请号：US11788391

申请日：2007-04-18

申请人： Didier Dutartre ,  Laurent Rubaldo ,  Alexandre Talbot

发明人： Didier Dutartre ,  Laurent Rubaldo ,  Alexandre Talbot

IPC分类号： H01L21/302

CPC分类号： H01L21/02381 ,  H01L21/02529 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262

摘要： Silicon-based single-crystal portions are produced on a surface of a substrate, selectively in zones where a single-crystal material is initially exposed. To do this, a layer is firstly formed over the entire surface of the substrate, using a silicon precursor of the non-chlorinated hydride type, and under suitable conditions so that the layer is a single-crystal layer in the zones of the substrate where a single-crystal material is initially exposed and amorphous outside these zones. The amorphous portions of the layer are then selectively etched so that only the single-crystal portions of the layer remain on the substrate.

摘要翻译： 在单晶材料最初暴露的区域选择性地在基板的表面上制造硅基单晶部分。 为此，首先在基板的整个表面上使用非氯化氢化物型的硅前体，并在合适的条件下形成层，使得该层是基板区域中的单晶层， 单晶材料最初在这些区域之外露出和非晶态。 然后选择性地蚀刻该层的非晶部分，使得只有该层的单晶部分保留在基板上。