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公开(公告)号:US20220101938A1
公开(公告)日:2022-03-31
申请号:US17549377
申请日:2021-12-13
Applicant: Micron Technology, Inc.
Inventor: Andrea Vigilante , Gianluca Scalisi , Andrea Pozzato , Andrea Salvioni , Mauro Luigi Sali
Abstract: A variety of applications can include systems and methods that include a memory system tester having an analyzer coupled to a test flow controller. The test flow controller can be arranged to generate test signals to a memory system with the analyzer arranged to couple to test pads of a package platform for the memory system. The analyzer can provide data to the test flow controller to conduct testing and/or debugging of the memory system, with the data based on real time monitoring of the test pads of the package platform. In various embodiments, the analyzer can provide data feedback to the test flow controller in real time such that the test flow controller can control the flow of test signals to the memory system in real time. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US20200211603A1
公开(公告)日:2020-07-02
申请号:US16555508
申请日:2019-08-29
Applicant: Micron Technology, Inc.
Inventor: Xiangang Luo , Jianmin Huang , Patroclo Fumagalli , Scott Anthony Stoller , Alessandro Magnavacca , Andrea Pozzato
IPC: G11C5/14 , G06F11/07 , G11C11/4099 , G11C29/38
Abstract: Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of zeros in the first physical page.
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公开(公告)号:US11670342B2
公开(公告)日:2023-06-06
申请号:US17561787
申请日:2021-12-24
Applicant: Micron Technology, Inc.
Inventor: Xiangang Luo , Jianmin Huang , Patroclo Fumagalli , Scott Anthony Stoller , Alessandro Magnavacca , Andrea Pozzato
IPC: G11C5/14 , G06F11/07 , G11C29/38 , G11C11/4099
CPC classification number: G11C5/144 , G06F11/076 , G06F11/079 , G11C11/4099 , G11C29/38
Abstract: Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of ones stored in the first physical page.
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公开(公告)号:US20210098030A1
公开(公告)日:2021-04-01
申请号:US17122531
申请日:2020-12-15
Applicant: Micron Technology, Inc
Inventor: Xiangang Luo , Jianmin Huang , Patroclo Fumagalli , Scott Anthony Stoller , Alessandro Magnavacca , Andrea Pozzato
IPC: G11C5/14 , G06F11/07 , G11C29/38 , G11C11/4099
Abstract: Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of zeros in the first physical page.
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公开(公告)号:US11763908B2
公开(公告)日:2023-09-19
申请号:US17549377
申请日:2021-12-13
Applicant: Micron Technology, Inc.
Inventor: Andrea Vigilante , Gianluca Scalisi , Andrea Pozzato , Andrea Salvioni , Mauro Luigi Sali
IPC: G11C29/38 , G11C29/36 , G11C16/04 , G11C16/10 , G11C16/14 , G11C16/26 , G01R31/319 , G11C29/12 , G01R31/70 , G06F11/22 , G01R31/27
CPC classification number: G11C29/38 , G11C16/0483 , G11C29/36 , G01R31/275 , G01R31/319 , G01R31/70 , G06F11/221 , G11C16/10 , G11C16/14 , G11C16/26 , G11C29/12005 , G11C2216/18
Abstract: A variety of applications can include systems and methods that include a memory system tester having an analyzer coupled to a test flow controller. The test flow controller can be arranged to generate test signals to a memory system with the analyzer arranged to couple to test pads of a package platform for the memory system. The analyzer can provide data to the test flow controller to conduct testing and/or debugging of the memory system, with the data based on real time monitoring of the test pads of the package platform. In various embodiments, the analyzer can provide data feedback to the test flow controller in real time such that the test flow controller can control the flow of test signals to the memory system in real time. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US20220189513A1
公开(公告)日:2022-06-16
申请号:US17561787
申请日:2021-12-24
Applicant: Micron Technology, Inc.
Inventor: Xiangang Luo , Jianmin Huang , Patroclo Fumagalli , Scott Anthony Stoller , Alessandro Magnavacca , Andrea Pozzato
IPC: G11C5/14 , G06F11/07 , G11C29/38 , G11C11/4099
Abstract: Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of ones stored in the first physical page.
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公开(公告)号:US11211136B2
公开(公告)日:2021-12-28
申请号:US16453745
申请日:2019-06-26
Applicant: Micron Technology, Inc.
Inventor: Andrea Vigilante , Gianluca Scalisi , Andrea Pozzato , Andrea Salvioni , Mauro Luigi Sali
IPC: G11C29/38 , G11C29/36 , G11C16/04 , G11C16/10 , G11C16/14 , G11C16/26 , G01R31/319 , G11C29/12 , G01R31/70 , G06F11/22 , G01R31/27
Abstract: A variety of applications can include systems and methods that include a memory system tester having an analyzer coupled to a test flow controller. The test flow controller can be arranged to generate test signals to a memory system with the analyzer arranged to couple to test pads of a package platform for the memory system. The analyzer can provide data to the test flow controller to conduct testing and/or debugging of the memory system, with the data based on real time monitoring of the test pads of the package platform. In various embodiments, the analyzer can provide data feedback to the test flow controller in real time such that the test flow controller can control the flow of test signals to the memory system in real time. Additional apparatus, systems, and methods are disclosed.
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公开(公告)号:US11211100B2
公开(公告)日:2021-12-28
申请号:US17122531
申请日:2020-12-15
Applicant: Micron Technology, Inc.
Inventor: Xiangang Luo , Jianmin Huang , Patroclo Fumagalli , Scott Anthony Stoller , Alessandro Magnavacca , Andrea Pozzato
IPC: G11C5/14 , G11C29/38 , G11C11/4099 , G06F11/07
Abstract: Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of zeros in the first physical page.
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