公开(公告)号：US20230244598A1

公开(公告)日：2023-08-03

申请号：US17591729

申请日：2022-02-03

Applicant: Micron Technology, Inc.

Inventor： David A. Roberts

IPC: G06F12/02 ,  G06F12/0882 ,  G06F13/16

CPC classification number: G06F12/0238 ,  G06F12/0292 ,  G06F12/0882 ,  G06F13/1689 ,  G06F13/1621

Abstract: Systems, apparatuses, and methods related to memory access statistics monitoring are described. A host is configured to map pages of memory for applications to a number of memory devices coupled thereto. A first memory device comprises a monitoring component configured to monitor access statistics of pages of memory mapped to the first memory device. A second memory device does not include a monitoring component capable of monitoring access statistics of pages of memory mapped thereto. The host is configured to map a portion of pages of memory for an application to the first memory device in order to obtain access statistics corresponding to the portion of pages of memory upon execution of the application despite there being space available on the second memory device and adjust mappings of the pages of memory for the application based on the obtained access statistics corresponding to the portion of pages.

公开(公告)号：US20190121723A1

公开(公告)日：2019-04-25

申请号：US16126405

申请日：2018-09-10

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F12/02 ,  G06F3/06 ,  G06F1/20 ,  G06F1/3234 ,  G06F12/122 ,  G06F13/24 ,  G06F13/42 ,  G06F13/16 ,  G11C7/04

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

公开(公告)号：US20180322039A1

公开(公告)日：2018-11-08

申请号：US16030600

申请日：2018-07-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： David A. Roberts ,  J. Thomas Pawlowski ,  Robert Walker

IPC: G06F12/02 ,  G06F13/16

Abstract: Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a processing unit configured to run an operating system, and a memory coupled to the processing unit. The memory configured to communicate with the processing unit via a memory bus. The example apparatus may further include an adaptive memory controller configured to receive monitored statistical data from the memory and from the processing unit. The adaptive memory controller is configured to manage the memory based on the monitored statistical data.

公开(公告)号：US10089221B2

公开(公告)日：2018-10-02

申请号：US14247833

申请日：2014-04-08

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F3/00 ,  G06F13/00 ,  G06F13/12 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06 ,  G06F12/122 ,  G06F13/24 ,  G11C7/04 ,  G06F1/20 ,  G06F1/32 ,  G06F13/16 ,  G06F13/42 ,  G11C11/406

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

公开(公告)号：US09767012B2

公开(公告)日：2017-09-19

申请号：US15156022

申请日：2016-05-16

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F3/00 ,  G06F13/00 ,  G06F13/12 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06 ,  G06F12/122 ,  G06F13/24 ,  G11C7/04 ,  G06F1/20 ,  G06F1/32 ,  G06F13/16 ,  G06F13/42 ,  G11C11/406

CPC classification number: G06F12/0223 ,  G06F1/206 ,  G06F1/3275 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0673 ,  G06F12/023 ,  G06F12/122 ,  G06F13/1668 ,  G06F13/24 ,  G06F13/4282 ,  G06F2212/1016 ,  G11C7/04 ,  G11C11/40626 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/16

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

公开(公告)号：US09342443B2

公开(公告)日：2016-05-17

申请号：US14055672

申请日：2013-10-16

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F3/00 ,  G06F13/00 ,  G06F13/12 ,  G06F13/28 ,  G06F12/02 ,  G06F3/06 ,  G06F12/12 ,  G06F13/24 ,  G11C7/04 ,  G06F1/20 ,  G06F1/32 ,  G11C11/406

CPC classification number: G06F12/0223 ,  G06F1/206 ,  G06F1/3275 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0673 ,  G06F12/023 ,  G06F12/122 ,  G06F13/1668 ,  G06F13/24 ,  G06F13/4282 ,  G06F2212/1016 ,  G11C7/04 ,  G11C11/40626 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/16

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

Abstract translation: 描述了将存储区域映射到基于存储器区域的热数据的处理的方法。 在一些实施例中，存储器控制器可以接收存储器分配请求。 存储器分配请求可以包括逻辑存储器地址。 该方法还可以包括基于存储器系统的存储器区域的热数据将逻辑存储器地址映射到存储器系统的存储器区域中的地址。 还描述了附加的方法和系统。

公开(公告)号：US11264079B1

公开(公告)日：2022-03-01

申请号：US17127654

申请日：2020-12-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： David A. Roberts

IPC: G11C11/24 ,  G11C11/4078

Abstract: Apparatuses, systems, and methods for row hammer based cache lockdown. A controller of a memory may include an aggressor detector circuit which determines if addresses are aggressor addresses or not. The controller may include a tracker circuit which may count a number of times an address is identified as an aggressor, and may determine if the aggressor address is a frequent aggressor address based on the count. If the address is a frequent aggressor address, a cache entry associated with the frequent aggressor address may be locked (e.g., for a set amount of time). In some embodiments, the controller may include a second tracker which may determine if the frequent aggressor address is a highly attacked address. An address mapping associated with the highly attacked address may be changed.

公开(公告)号：US11119908B2

公开(公告)日：2021-09-14

申请号：US16886252

申请日：2020-05-28

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F1/20 ,  G06F13/16 ,  G06F12/02 ,  G06F3/06 ,  G11C7/04 ,  G06F1/3234 ,  G06F9/50 ,  G06F12/122 ,  G06F13/24 ,  G06F13/42 ,  G11C11/406

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

公开(公告)号：US10817412B2

公开(公告)日：2020-10-27

申请号：US16030600

申请日：2018-07-09

Applicant: MICRON TECHNOLOGY, INC.

Inventor： David A. Roberts ,  J. Thomas Pawlowski ,  Robert Walker

IPC: G06F12/02 ,  G06F13/16

Abstract: Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a memory configured to store information. Memory of the memory is configured with two or more information depth maps. The example apparatus further includes a memory translation unit (MTU) configured to support an intermediate depth map of the memory during the migration of the information stored at the memory from a first information depth map of the two or more information depth maps to a second information depth map of the two or more information depth by maintaining mapping tables. The MTU is further configured to provide a mapped address associated with a requested address of a memory access request to the memory based on the mapping tables.

公开(公告)号：US20160259721A1

公开(公告)日：2016-09-08

申请号：US15156022

申请日：2016-05-16

Applicant: Micron Technology, Inc.

Inventor： Robert Walker ,  David A. Roberts

IPC: G06F12/02 ,  G06F13/16 ,  G06F13/42 ,  G06F3/06

CPC classification number: G06F12/0223 ,  G06F1/206 ,  G06F1/3275 ,  G06F3/0604 ,  G06F3/0631 ,  G06F3/0673 ,  G06F12/023 ,  G06F12/122 ,  G06F13/1668 ,  G06F13/24 ,  G06F13/4282 ,  G06F2212/1016 ,  G11C7/04 ,  G11C11/40626 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D10/151 ,  Y02D10/16

Abstract: Methods of mapping memory regions to processes based on thermal data of memory regions are described. In some embodiments, a memory controller may receive a memory allocation request. The memory allocation request may include a logical memory address. The method may further include mapping the logical memory address to an address in a memory region of the memory system based on thermal data for memory regions of the memory system. Additional methods and systems are also described.

Abstract translation: 描述了将存储区域映射到基于存储器区域的热数据的处理的方法。 在一些实施例中，存储器控制器可以接收存储器分配请求。 存储器分配请求可以包括逻辑存储器地址。 该方法还可以包括基于存储器系统的存储器区域的热数据将逻辑存储器地址映射到存储器系统的存储器区域中的地址。 还描述了附加的方法和系统。