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    Circuit and method for dynamic current compensation
    3.
    发明授权
    Circuit and method for dynamic current compensation 有权
    动态电流补偿电路及方法

    公开(公告)号：US07741911B2

    公开(公告)日：2010-06-22

    申请号：US12170866

    申请日：2008-07-10

    申请人： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

    发明人： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45475 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/411 ,  H03F2200/456 ,  H03F2203/45526 ,  H03F2203/45528

    摘要： An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.

    摘要翻译： 运算放大器包括第一级和第二级，第一级用于接收两个输入信号，第二级耦合到第一级，其中第二级包括具有运算放大器的第一输出的第一部分和 第二部分是运算放大器的第二个输出。 一种方法包括向第二级的第一部分提供第一电流，并向第二级的第二部分提供第二电流。 该方法还包括基于第二级的第一部分的电流消耗来调整第一电流，并且基于第二级的第二部分的电流消耗来调整第二电流，其中第一电流和 第二电流基本上是恒定的。

    Frequency synthesizer
    4.
    发明授权
    Frequency synthesizer 有权
    频率合成器

    公开(公告)号：US07733136B2

    公开(公告)日：2010-06-08

    申请号：US12108843

    申请日：2008-04-24

    申请人： Chih-Hung Chen ,  Ming-Ching Kuo ,  Shiau-Wen Kao

    发明人： Chih-Hung Chen ,  Ming-Ching Kuo ,  Shiau-Wen Kao

    IPC分类号： H03L7/06

    CPC分类号： H03L7/18 ,  H03L7/0895 ,  H03L7/095

    摘要： A frequency synthesizer includes: a fractional-N synthesizer configured to provide, in a locked condition, an output signal with an output frequency based on an input signal with a reference frequency, the fractional-N synthesizer including a charge pump outputting a current to be calibrated; a lock detector coupled to the fractional-N synthesizer to detect the locked condition, the lock detector being configured to send a first signal indicating the detection; a calibration component coupled to the lock detector and the fractional-N synthesizer, the calibration component being configured to provide a second signal to calibrate the current after receiving the first signal, based on a voltage sampled from the fractional-N synthesizer; and a current source array coupled to the calibration component and the fractional N synthesizer, the current source array being configured to calibrate the current based on the second signal.

    摘要翻译： 频率合成器包括：分数N合成器，被配置为在锁定状态下提供具有基于具有参考频率的输入信号的输出频率的输出信号，分数N合成器包括输出电流的电荷泵 校准; 锁定检测器，其耦合到所述分数N合成器以检测所述锁定状态，所述锁定检测器被配置为发送指示所述检测的第一信号; 耦合到所述锁定检测器和所述分数N合成器的校准部件，所述校准部件被配置为基于从所述分数N合成器采样的电压来提供第二信号以在接收到所述第一信号之后校准所述电流; 以及耦合到所述校准组件和所述分数N个合成器的电流源阵列，所述电流源阵列被配置为基于所述第二信号校准所述电流。

    FREQUENCY SYNTHESIZER
    5.
    发明申请
    FREQUENCY SYNTHESIZER 有权
    频率合成器

    公开(公告)号：US20090108892A1

    公开(公告)日：2009-04-30

    申请号：US12108843

    申请日：2008-04-24

    申请人： Chih-Hung CHEN ,  Ming-Ching Kuo ,  Shiau-Wen Kao

    发明人： Chih-Hung CHEN ,  Ming-Ching Kuo ,  Shiau-Wen Kao

    IPC分类号： H03B21/02

    CPC分类号： H03L7/18 ,  H03L7/0895 ,  H03L7/095

    摘要： A frequency synthesizer includes: a fractional-N synthesizer configured to provide, in a locked condition, an output signal with an output frequency based on an input signal with a reference frequency, the fractional-N synthesizer including a charge pump outputting a current to be calibrated; a lock detector coupled to the fractional-N synthesizer to detect the locked condition, the lock detector being configured to send a first signal indicating the detection; a calibration component coupled to the lock detector and the fractional-N synthesizer, the calibration component being configured to provide a second signal to calibrate the current after receiving the first signal, based on a voltage sampled from the fractional-N synthesizer; and a current source array coupled to the calibration component and the fractional N synthesizer, the current source array being configured to calibrate the current based on the second signal.

    摘要翻译： 频率合成器包括：分数N合成器，被配置为在锁定状态下提供具有基于具有参考频率的输入信号的输出频率的输出信号，分数N合成器包括输出电流的电荷泵 校准; 锁定检测器，其耦合到所述分数N合成器以检测所述锁定状态，所述锁定检测器被配置为发送指示所述检测的第一信号; 耦合到所述锁定检测器和所述分数N合成器的校准部件，所述校准部件被配置为基于从所述分数N合成器采样的电压来提供第二信号以在接收到所述第一信号之后校准所述电流; 以及耦合到所述校准组件和所述分数N个合成器的电流源阵列，所述电流源阵列被配置为基于所述第二信号校准所述电流。

    Variable gain amplifier including series-coupled cascode amplifiers
    6.
    发明授权
    Variable gain amplifier including series-coupled cascode amplifiers 有权
    可变增益放大器，包括串联耦合共源共栅放大器

    公开(公告)号：US07701289B2

    公开(公告)日：2010-04-20

    申请号：US12076289

    申请日：2008-03-17

    申请人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    发明人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45188 ,  H03F3/45192 ,  H03F3/72 ,  H03F2203/45052 ,  H03F2203/45302 ,  H03F2203/45396 ,  H03F2203/7231 ,  H03G1/0029

    摘要： A variable gain amplifier to convert an amplifier input voltage to an amplifier output voltage, the variable gain amplifier includes: a plurality of cascode amplifiers coupled in series; a plurality of switching transistor pair circuits coupled in series; and a bias circuit coupled to provide bias voltages to each of the plurality of cascode amplifiers; wherein each of the switching transistor pair circuits is further coupled between two consecutive ones of the cascode amplifiers; a first one of the cascode amplifiers is configured to receive the amplifier input voltage; and a last one of the cascode amplifiers is configured to provide the amplifier output voltage.

    摘要翻译： 一种可变增益放大器，用于将放大器输入电压转换为放大器输出电压，所述可变增益放大器包括：串联耦合的多个共源共栅放大器; 串联耦合的多个开关晶体管对电路; 以及偏置电路，其耦合以向所述多个共射共基放大器中的每一个提供偏置电压; 其中每个所述开关晶体管对电路进一步耦合在两个连续的共源共栅放大器之间; 串联放大器中的第一个被配置为接收放大器输入电压; 并且最后一个共源共栅放大器被配置为提供放大器输出电压。

    Variable gain amplifier including series-coupled cascode amplifiers
    7.
    发明申请
    Variable gain amplifier including series-coupled cascode amplifiers 有权
    可变增益放大器，包括串联耦合共源共栅放大器

    公开(公告)号：US20090108935A1

    公开(公告)日：2009-04-30

    申请号：US12076289

    申请日：2008-03-17

    申请人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    发明人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    IPC分类号： H03F3/45

    CPC分类号： H03F3/45188 ,  H03F3/45192 ,  H03F3/72 ,  H03F2203/45052 ,  H03F2203/45302 ,  H03F2203/45396 ,  H03F2203/7231 ,  H03G1/0029

    摘要： A variable gain amplifier to convert an amplifier input voltage to an amplifier output voltage, the variable gain amplifier includes: a plurality of cascode amplifiers coupled in series; a plurality of switching transistor pair circuits coupled in series; and a bias circuit coupled to provide bias voltages to each of the plurality of cascode amplifiers; wherein each of the switching transistor pair circuits is further coupled between two consecutive ones of the cascode amplifiers; a first one of the cascode amplifiers is configured to receive the amplifier input voltage; and a last one of the cascode amplifiers is configured to provide the amplifier output voltage.

    摘要翻译： 一种可变增益放大器，用于将放大器输入电压转换为放大器输出电压，所述可变增益放大器包括：串联耦合的多个共源共栅放大器; 串联耦合的多个开关晶体管对电路; 以及偏置电路，其耦合以向所述多个共射共基放大器中的每一个提供偏置电压; 其中每个所述开关晶体管对电路进一步耦合在两个连续的共源共栅放大器之间; 串联放大器中的第一个被配置为接收放大器输入电压; 并且最后一个共源共栅放大器被配置为提供放大器输出电压。

    METHODS AND SYSTEMS FOR CALIBRATING RC CIRCUITS
    8.
    发明申请
    METHODS AND SYSTEMS FOR CALIBRATING RC CIRCUITS 审中-公开
    用于校准RC电路的方法和系统

    公开(公告)号：US20090108858A1

    公开(公告)日：2009-04-30

    申请号：US12195585

    申请日：2008-08-21

    申请人： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

    发明人： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

    IPC分类号： H01G7/00 ,  G01R23/175 ,  G01R31/28

    CPC分类号： H03H7/0161 ,  H03H11/1291 ,  H03H2210/021 ,  H03H2210/043 ,  Y10T29/43 ,  Y10T29/49004

    摘要： A calibration apparatus includes an RC integrator circuit. The calibration apparatus further includes a bandwidth setting controller to provide a bandwidth setting code indicating a reference bandwidth value for calibration of the RC integrator circuit and a capacitance code generator, coupled to the RC integrator circuit, to generate a capacitance code to adjust a capacitance of the RC integrator circuit using the bandwidth setting code and a current capacitance value of the RC integrator circuit.

    摘要翻译： 校准装置包括RC积分器电路。 校准装置还包括带宽设置控制器，用于提供指示用于校准RC积分器电路的参考带宽值的带宽设置代码和耦合到RC积分器电路的电容代码发生器，以产生用于调整电容的电容 RC积分器电路使用带宽设置码和RC积分电路的电流电容值。

    Low noise amplifier
    10.
    发明授权
    Low noise amplifier 有权
    低噪声放大器

    公开(公告)号：US07671686B2

    公开(公告)日：2010-03-02

    申请号：US12188280

    申请日：2008-08-08

    申请人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    发明人： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

    IPC分类号： H03F3/04

    CPC分类号： H03F3/45179 ,  H03F3/19 ,  H03F2200/294 ,  H03F2203/45306 ,  H03F2203/45318

    摘要： A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.

    摘要翻译： 将单端输入转换为双端输出的低噪声放大器电路包括输入跨导级电路，包括与第二MOS晶体管并联耦合的第一MOS晶体管; 电流缓冲电路，包括与第四MOS晶体管并联耦合的第三MOS晶体管; 第一，第二，第三和第四晶体管中的每一个具有主体，栅极，源极和漏极; 输入跨导级电路和当前缓冲电路被共源共栅耦合，形成共源共栅放大器配置; 单端输入在输入跨导级电路中位于第一和第二晶体管之一的源极处; 所述双端输出是跨越所述第三晶体管的漏极和所述第四晶体管的漏极的差分输出; 输入跨导级电路的第一和第二晶体管交叉耦合，其中第一晶体管的主体耦合到第二晶体管的源极，并且第二晶体管的主体耦合到第一晶体管的源极; 并且当前缓冲电路的第三和第四晶体管是交叉耦合的，其中第一电容耦合在第三晶体管的栅极和第四晶体管的源极之间，第二电容耦合在第四晶体管的栅极之间 和第三晶体管的源极。