公开(公告)号：US20110221489A1

公开(公告)日：2011-09-15

申请号：US12767813

申请日：2010-04-27

Applicant: Shih-Hao Tarng ,  Jia-Hung Peng ,  Ming-Ching Kuo

Inventor： Shih-Hao Tarng ,  Jia-Hung Peng ,  Ming-Ching Kuo

IPC: H03L7/08

CPC classification number: H03L7/1976 ,  H03L7/087 ,  H03L7/099

Abstract: An automatic frequency calibration circuit and an automatic frequency calibration method for a fractional-N frequency synthesizer are provided. In a calibration mode, a state machine adjusts a fractional part and an integer part of a division ratio of a frequency divider unit according to a required precision. A first and a second frequency detecting units detect a reference frequency and an output frequency of the frequency divider unit, respectively. A judging interval unit defines at least one judging period in a total comparison time. A comparator compares the outputs of the first and the second frequency detecting units and outputs a comparison result at the judging period. Wherein, the state machine changes the capacitor configuration of a voltage-controlled oscillator when the comparison result shows that the reference frequency does not match the output frequency of the frequency divider unit.

Abstract translation: 提供了一种用于分数N频率合成器的自动频率校准电路和自动频率校准方法。 在校准模式中，状态机根据所需的精度来调整分频器单元的分数部分和整数部分的分频比。 第一和第二频率检测单元分别检测分频器单元的参考频率和输出频率。 判断间隔单元定义总比较时间中的至少一个判断周期。 比较器比较第一和第二频率检测单元的输出，并在判断周期输出比较结果。 其中，当比较结果表明参考频率与分频器单元的输出频率不匹配时，状态机改变压控振荡器的电容器配置。

公开(公告)号：US07741911B2

公开(公告)日：2010-06-22

申请号：US12170866

申请日：2008-07-10

Applicant: Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

Inventor： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F3/45183 ,  H03F3/45659 ,  H03F2200/411 ,  H03F2200/456 ,  H03F2203/45526 ,  H03F2203/45528

Abstract: An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.

Abstract translation: 运算放大器包括第一级和第二级，第一级用于接收两个输入信号，第二级耦合到第一级，其中第二级包括具有运算放大器的第一输出的第一部分和 第二部分是运算放大器的第二个输出。 一种方法包括向第二级的第一部分提供第一电流，并向第二级的第二部分提供第二电流。 该方法还包括基于第二级的第一部分的电流消耗来调整第一电流，并且基于第二级的第二部分的电流消耗来调整第二电流，其中第一电流和 第二电流基本上是恒定的。

公开(公告)号：US20120044006A1

公开(公告)日：2012-02-23

申请号：US12886550

申请日：2010-09-20

Applicant: Shiau-Wen Kao ,  Jia-Hung Peng ,  Ming-Ching Kuo

Inventor： Shiau-Wen Kao ,  Jia-Hung Peng ,  Ming-Ching Kuo

IPC: H03L5/00

CPC classification number: H03F3/45475 ,  H03F3/45928 ,  H03F2203/45048 ,  H03F2203/45591

Abstract: A DC offset calibration apparatus including a signal processing unit, a comparison unit, a first resistor array, a second resistor array, and a resistor array control unit is provided. The signal processing unit receives an input differential signal and generates an output differential signal. The comparison unit detects and determines a first DC output voltage and a second DC output voltage of the output differential signal and generates a DC offset signal. First ends of the first resistor array and the second resistor array are respectively coupled to a first input terminal and a second input terminal of the signal processing unit. The resistor array control unit adjusts resistances of the first and the second resistor array according to the DC offset signal and a bit code sequence until the DC offset signal enters a transient state, so as to calibrate a DC offset voltage in the output differential signal.

Abstract translation: 提供了包括信号处理单元，比较单元，第一电阻器阵列，第二电阻器阵列和电阻器阵列控制单元的DC偏移校准装置。 信号处理单元接收输入差分信号并产生输出差分信号。 比较单元检测并确定输出差分信号的第一直流输出电压和第二直流输出电压，并产生直流偏移信号。 第一电阻器阵列和第二电阻器阵列的第一端分别耦合到信号处理单元的第一输入端子和第二输入端子。 电阻器阵列控制单元根据直流偏移信号和位码序列调整第一和第二电阻器阵列的电阻，直到直流偏移信号进入过渡状态，以校准输出差分信号中的直流偏移电压。

公开(公告)号：US07701289B2

公开(公告)日：2010-04-20

申请号：US12076289

申请日：2008-03-17

Applicant: Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

Inventor： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

IPC: H03F3/45

CPC classification number: H03F3/45188 ,  H03F3/45192 ,  H03F3/72 ,  H03F2203/45052 ,  H03F2203/45302 ,  H03F2203/45396 ,  H03F2203/7231 ,  H03G1/0029

Abstract: A variable gain amplifier to convert an amplifier input voltage to an amplifier output voltage, the variable gain amplifier includes: a plurality of cascode amplifiers coupled in series; a plurality of switching transistor pair circuits coupled in series; and a bias circuit coupled to provide bias voltages to each of the plurality of cascode amplifiers; wherein each of the switching transistor pair circuits is further coupled between two consecutive ones of the cascode amplifiers; a first one of the cascode amplifiers is configured to receive the amplifier input voltage; and a last one of the cascode amplifiers is configured to provide the amplifier output voltage.

Abstract translation: 一种可变增益放大器，用于将放大器输入电压转换为放大器输出电压，所述可变增益放大器包括：串联耦合的多个共源共栅放大器; 串联耦合的多个开关晶体管对电路; 以及偏置电路，其耦合以向所述多个共射共基放大器中的每一个提供偏置电压; 其中每个所述开关晶体管对电路进一步耦合在两个连续的共源共栅放大器之间; 串联放大器中的第一个被配置为接收放大器输入电压; 并且最后一个共源共栅放大器被配置为提供放大器输出电压。

公开(公告)号：US07642816B2

公开(公告)日：2010-01-05

申请号：US11907151

申请日：2007-10-10

Applicant: Ming-Ching Kuo ,  Pei-Ling Tsai ,  Chih-Hung Chen

Inventor： Ming-Ching Kuo ,  Pei-Ling Tsai ,  Chih-Hung Chen

IPC: H02M11/00

CPC classification number: H03F3/45201 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0043 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45179 ,  H03F2200/451 ,  H03F2203/45292 ,  H03F2203/45318 ,  H03F2203/45322 ,  H03F2203/45366 ,  H03F2203/45394 ,  H03F2203/45544 ,  H03F2203/45638

Abstract: A transconductor to convert an input voltage to an output current, includes: a primary transconductance stage to provide the output current from the input voltage and a driving current; an adaptive transconductance stage coupled in series with the primary transconductance stage to generate the driving current from the input voltage; and a bias circuit coupled to provide a primary bias voltage to the primary transconductance stage and an adaptive bias voltage to the adaptive transconductance stage.

Abstract translation: 将输入电压转换为输出电流的跨导体包括：初级跨导级，用于从输入电压和驱动电流提供输出电流; 自适应跨导级与初级跨导级串联耦合以从输入电压产生驱动电流; 以及偏置电路，其耦合以向初级跨导级提供初级偏置电压，并将自适应偏置电压提供给自适应跨导级。

公开(公告)号：US20090108943A1

公开(公告)日：2009-04-30

申请号：US12188280

申请日：2008-08-08

Applicant: MING-CHING KUO ,  SHIAU-WEN KAO ,  CHIH-HUNG CHEN

Inventor： MING-CHING KUO ,  SHIAU-WEN KAO ,  CHIH-HUNG CHEN

IPC: H03F3/45

CPC classification number: H03F3/45179 ,  H03F3/19 ,  H03F2200/294 ,  H03F2203/45306 ,  H03F2203/45318

Abstract: A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.

Abstract translation: 将单端输入转换为双端输出的低噪声放大器电路包括输入跨导级电路，包括与第二MOS晶体管并联耦合的第一MOS晶体管; 电流缓冲电路，包括与第四MOS晶体管并联耦合的第三MOS晶体管; 第一，第二，第三和第四晶体管中的每一个具有主体，栅极，源极和漏极; 输入跨导级电路和当前缓冲电路被共源共栅耦合，形成共源共栅放大器配置; 单端输入在输入跨导级电路中位于第一和第二晶体管之一的源极处; 所述双端输出是跨越所述第三晶体管的漏极和所述第四晶体管的漏极的差分输出; 输入跨导级电路的第一和第二晶体管交叉耦合，其中第一晶体管的主体耦合到第二晶体管的源极，并且第二晶体管的主体耦合到第一晶体管的源极; 并且当前缓冲电路的第三和第四晶体管是交叉耦合的，其中第一电容耦合在第三晶体管的栅极和第四晶体管的源极之间，第二电容耦合在第四晶体管的栅极之间 和第三晶体管的源极。

公开(公告)号：US20090108935A1

公开(公告)日：2009-04-30

申请号：US12076289

申请日：2008-03-17

Applicant: Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

Inventor： Ming-Ching Kuo ,  Shiau-Wen Kao ,  Chih-Hung Chen

IPC: H03F3/45

CPC classification number: H03F3/45188 ,  H03F3/45192 ,  H03F3/72 ,  H03F2203/45052 ,  H03F2203/45302 ,  H03F2203/45396 ,  H03F2203/7231 ,  H03G1/0029

Abstract: A variable gain amplifier to convert an amplifier input voltage to an amplifier output voltage, the variable gain amplifier includes: a plurality of cascode amplifiers coupled in series; a plurality of switching transistor pair circuits coupled in series; and a bias circuit coupled to provide bias voltages to each of the plurality of cascode amplifiers; wherein each of the switching transistor pair circuits is further coupled between two consecutive ones of the cascode amplifiers; a first one of the cascode amplifiers is configured to receive the amplifier input voltage; and a last one of the cascode amplifiers is configured to provide the amplifier output voltage.

Abstract translation: 一种可变增益放大器，用于将放大器输入电压转换为放大器输出电压，所述可变增益放大器包括：串联耦合的多个共源共栅放大器; 串联耦合的多个开关晶体管对电路; 以及偏置电路，其耦合以向所述多个共射共基放大器中的每一个提供偏置电压; 其中每个所述开关晶体管对电路进一步耦合在两个连续的共源共栅放大器之间; 串联放大器中的第一个被配置为接收放大器输入电压; 并且最后一个共源共栅放大器被配置为提供放大器输出电压。

公开(公告)号：US20090108858A1

公开(公告)日：2009-04-30

申请号：US12195585

申请日：2008-08-21

Applicant: Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

Inventor： Shiau-Wen Kao ,  Ming-Ching Kuo ,  Chih-Hung Chen

IPC: H01G7/00 ,  G01R23/175 ,  G01R31/28

CPC classification number: H03H7/0161 ,  H03H11/1291 ,  H03H2210/021 ,  H03H2210/043 ,  Y10T29/43 ,  Y10T29/49004

Abstract: A calibration apparatus includes an RC integrator circuit. The calibration apparatus further includes a bandwidth setting controller to provide a bandwidth setting code indicating a reference bandwidth value for calibration of the RC integrator circuit and a capacitance code generator, coupled to the RC integrator circuit, to generate a capacitance code to adjust a capacitance of the RC integrator circuit using the bandwidth setting code and a current capacitance value of the RC integrator circuit.

Abstract translation: 校准装置包括RC积分器电路。 校准装置还包括带宽设置控制器，用于提供指示用于校准RC积分器电路的参考带宽值的带宽设置代码和耦合到RC积分器电路的电容代码发生器，以产生用于调整电容的电容 RC积分器电路使用带宽设置码和RC积分电路的电流电容值。

公开(公告)号：US20090096490A1

公开(公告)日：2009-04-16

申请号：US11907151

申请日：2007-10-10

Applicant: Ming-Ching Kuo ,  Pei-Ling Tsai ,  Chih-Hung Chen

Inventor： Ming-Ching Kuo ,  Pei-Ling Tsai ,  Chih-Hung Chen

IPC: H02M11/00

CPC classification number: H03F3/45201 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0043 ,  H03F1/3211 ,  H03F3/195 ,  H03F3/45179 ,  H03F2200/451 ,  H03F2203/45292 ,  H03F2203/45318 ,  H03F2203/45322 ,  H03F2203/45366 ,  H03F2203/45394 ,  H03F2203/45544 ,  H03F2203/45638

Abstract: A transconductor to convert an input voltage to an output current, includes: a primary transconductance stage to provide the output current from the input voltage and a driving current; an adaptive transconductance stage coupled in series with the primary transconductance stage to generate the driving current from the input voltage; and a bias circuit coupled to provide a primary bias voltage to the primary transconductance stage and an adaptive bias voltage to the adaptive transconductance stage.

Abstract translation: 将输入电压转换为输出电流的跨导体包括：初级跨导级，用于从输入电压和驱动电流提供输出电流; 自适应跨导级与初级跨导级串联耦合以从输入电压产生驱动电流; 以及偏置电路，其耦合以向初级跨导级提供初级偏置电压，并将自适应偏置电压提供给自适应跨导级。

公开(公告)号：US20100308914A1

公开(公告)日：2010-12-09

申请号：US12535699

申请日：2009-08-05

Applicant: Ming-Ching Kuo ,  Chien-Nan Kuo ,  Shiau-Wen Kao

Inventor： Ming-Ching Kuo ,  Chien-Nan Kuo ,  Shiau-Wen Kao

IPC: H03F3/45

CPC classification number: H03F3/45179 ,  H03F2200/294 ,  H03F2200/534 ,  H03F2203/45306 ,  H03F2203/45311 ,  H03F2203/45562 ,  H03F2203/45621 ,  H03F2203/45644

Abstract: A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.

Abstract translation: 提供了包括放大器内核电路和直流偏置单元的低噪声放大器。 放大器内核电路用于接收单个输入信号或差分输入信号，以输出差分输出信号。 DC偏置单元耦合到放大器核心电路，并用于根据其电路配置处理信号源以产生单个输入信号或差分输入信号。