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公开(公告)号:US20130099353A1
公开(公告)日:2013-04-25
申请号:US13689983
申请日:2012-11-30
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Noboru KATO , Jun SASAKI , Kosuke YAMADA , Satoshi ISHINO
IPC: H01L23/60
CPC classification number: H01L23/60 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L27/0248 , H01L27/0296 , H01L28/10 , H01L28/20 , H01L2224/0401 , H01L2224/05016 , H01L2224/05655 , H01L2224/06051 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/81192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/14 , H01L2924/181 , H01L2924/30107 , H01L2924/00
Abstract: An ESD protection device includes a semiconductor substrate including input/output electrodes and a rewiring layer provided on a surface of the semiconductor substrate. An ESD protection circuit is provided on or in an outer layer of the semiconductor substrate, and the input/output electrodes are connected to the ESD protection circuit. The rewiring layer includes interlayer wiring lines, in-plane wiring lines, and post electrodes. First ends of the interlayer wiring lines disposed in the thickness direction are connected to the input/output electrodes disposed on the surface of the semiconductor substrate, and second ends of the interlayer wiring lines are connected to first ends of the in-plane wiring lines routed in plan view. Prismatic post electrodes are provided between second ends of the in-plane wiring lines and terminal electrodes.
Abstract translation: ESD保护器件包括包括输入/输出电极和设置在半导体衬底的表面上的重新布线层的半导体衬底。 ESD保护电路设置在半导体衬底的外层上或其外层,并且输入/输出电极连接到ESD保护电路。 再布线层包括层间布线,面内布线和柱电极。 设置在厚度方向上的层间布线的第一端连接到设置在半导体衬底的表面上的输入/输出电极,层间布线的第二端连接到布线的面内布线的第一端 在平面图。 棱柱形电极设置在面内布线和端子电极的第二端之间。
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公开(公告)号:US20150079273A1
公开(公告)日:2015-03-19
申请号:US14553031
申请日:2014-11-25
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kosuke YAMADA , Takashi NOMA , Jun ADACHI
IPC: H05K9/00
CPC classification number: H05K9/0079 , H01T4/12 , H01T21/00
Abstract: An ESD protection device includes an alumina multilayer substrate, a hollow portion, a discharge electrode pair, discharge-assisting electrodes, and a vitreous substance. The hollow portion is disposed inside of the alumina multilayer substrate. The electrodes of the discharge electrode pair are disposed opposite to each other at an interface between the hollow portion and the alumina multilayer substrate. The discharge-assisting electrodes are disposed dispersedly between the opposite electrodes of the discharge electrode pair. The vitreous substance covers the discharge-assisting electrodes in the inside of the hollow portion. A trial discharge is executed so as to induce creepage discharge between the electrodes of the discharge electrode pair in advance.
Abstract translation: ESD保护装置包括氧化铝多层基板,中空部,放电电极对,放电辅助电极和玻璃状物质。 中空部设置在氧化铝多层基板的内部。 放电电极对的电极在中空部分和氧化铝多层基板之间的界面处彼此相对设置。 放电辅助电极分散配置在放电电极对的相对电极之间。 玻璃质物质覆盖中空部分的内部的放电辅助电极。 进行试验放电,以预先在放电电极对的电极之间引起爬电放电。
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公开(公告)号:US20130168837A1
公开(公告)日:2013-07-04
申请号:US13762417
申请日:2013-02-08
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor: Noboru KATO , Jun SASAKI , Kosuke YAMADA
IPC: H01L23/60
CPC classification number: H01L23/60 , H01L23/3114 , H01L23/525 , H01L23/642 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L27/0255 , H01L27/0296 , H01L2223/6677 , H01L2224/02331 , H01L2224/0235 , H01L2224/02371 , H01L2224/02375 , H01L2224/02377 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05016 , H01L2224/05024 , H01L2224/05026 , H01L2224/05155 , H01L2224/05548 , H01L2224/05562 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/131 , H01L2224/14131 , H01L2224/16238 , H01L2224/81191 , H01L2224/81192 , H01L2224/81815 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/12036 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
Abstract: An ESD protection device includes a semiconductor substrate including input/output electrodes and a rewiring layer located on the top surface of the semiconductor substrate. An ESD protection circuit is provided in the top layer of the semiconductor substrate, and the input/output electrodes are connected to the ESD protection circuit. The rewiring layer includes interlayer wiring lines, in-plane wiring lines, and post-shaped electrodes. First ends of the interlayer wiring lines provided in the thickness direction are connected to the input/output electrodes provided on the top surface of the semiconductor substrate and the second ends are connected to first ends of the in-plane wiring lines extending in the plane direction. The distance between the centers of the first and second post-shaped electrodes is larger than the distance between the centers of the first and second input/output electrodes.
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公开(公告)号:US20150061146A1
公开(公告)日:2015-03-05
申请号:US14538951
申请日:2014-11-12
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Noboru KATO , Jun SASAKI , Kosuke YAMADA
CPC classification number: H01L23/60 , H01L23/3114 , H01L23/525 , H01L23/642 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L27/0255 , H01L27/0296 , H01L2223/6677 , H01L2224/02331 , H01L2224/0235 , H01L2224/02371 , H01L2224/02375 , H01L2224/02377 , H01L2224/02379 , H01L2224/0401 , H01L2224/04105 , H01L2224/05016 , H01L2224/05024 , H01L2224/05026 , H01L2224/05155 , H01L2224/05548 , H01L2224/05562 , H01L2224/05568 , H01L2224/05611 , H01L2224/05644 , H01L2224/131 , H01L2224/14131 , H01L2224/16238 , H01L2224/81191 , H01L2224/81192 , H01L2224/81815 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/07802 , H01L2924/12032 , H01L2924/12036 , H01L2924/14 , H01L2924/181 , H01L2924/351 , H01L2924/01014 , H01L2924/00 , H01L2224/05552
Abstract: An ESD protection device includes a semiconductor substrate including input/output electrodes and a rewiring layer located on the top surface of the semiconductor substrate. An ESD protection circuit is provided in the top layer of the semiconductor substrate, and the input/output electrodes are connected to the ESD protection circuit. The rewiring layer includes interlayer wiring lines, in-plane wiring lines, and post-shaped electrodes. First ends of the interlayer wiring lines provided in the thickness direction are connected to the input/output electrodes provided on the top surface of the semiconductor substrate and the second ends are connected to first ends of the in-plane wiring lines extending in the plane direction. The distance between the centers of the first and second post-shaped electrodes is larger than the distance between the centers of the first and second input/output electrodes.
Abstract translation: ESD保护器件包括:半导体衬底,包括输入/输出电极和位于半导体衬底的顶表面上的再布线层。 在半导体衬底的顶层中设置ESD保护电路,并且输入/输出电极连接到ESD保护电路。 再布线层包括层间布线,面内布线和后形电极。 设置在厚度方向上的层间布线的第一端连接到设置在半导体衬底的顶表面上的输入/输出电极,并且第二端连接到在平面方向上延伸的面内布线的第一端 。 第一和第二后形电极的中心之间的距离大于第一和第二输入/输出电极的中心之间的距离。
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公开(公告)号:US20130163130A1
公开(公告)日:2013-06-27
申请号:US13774077
申请日:2013-02-22
Applicant: Murata Manufacturing Co., Ltd.
Inventor: Kosuke YAMADA , Takashi NOMA , Jun ADACHI
IPC: H02H9/04
CPC classification number: H05K9/0079 , H01T4/12 , H01T21/00 , H02H9/04
Abstract: An ESD protection device includes an alumina multilayer substrate, a hollow portion, a discharge electrode pair, discharge-assisting electrodes, and a vitreous substance. The hollow portion is disposed inside of the alumina multilayer substrate. The electrodes of the discharge electrode pair are disposed opposite to each other at an interface between the hollow portion and the alumina multilayer substrate. The discharge-assisting electrodes are disposed dispersedly between the opposite electrodes of the discharge electrode pair. The vitreous substance covers the discharge-assisting electrodes in the inside of the hollow portion. A trial discharge is executed so as to induce creepage discharge between the electrodes of the discharge electrode pair in advance.
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