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    WIRING CIRCUIT BOARD AND METHOD OF PRODUCING THE SAME
    1.
    发明公开
    WIRING CIRCUIT BOARD AND METHOD OF PRODUCING THE SAME 审中-公开

    公开(公告)号：US20230189440A1

    公开(公告)日：2023-06-15

    申请号：US18056095

    申请日：2022-11-16

    Applicant: NITTO DENKO CORPORATION

    Inventor： Kanayo SAWASHI ,  Akihito MATSUTOMI

    IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46

    CPC classification number: H05K1/115 ,  H05K3/4084 ,  H05K3/4623 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2203/107

    Abstract: A wiring circuit board includes an insulating layer having a via penetrating in a thickness direction, a first conductive layer disposed on a one-side surface in the thickness direction of the insulating layer, a second conductive layer disposed on the other-side surface in the thickness direction of the insulating layer, and a conductive portion disposed on an inner peripheral surface of the via and electrically connecting the first and second conductive layers. Length L of 1 µm-10 µm inclusive, is measured by: drawing a segment joining first and second connection points from respectively, the one-side surface to the other-side surface in the thickness direction of the insulating layer and the inner peripheral surface in the cross-sectional view; identifying an outermost position farthest outward from the segment on the inner peripheral surface in the cross-sectional view; and measuring the length as the shortest distance from the segment to the outermost position.

    COIL PRINTED CIRCUIT BOARD, POWER RECEPTION MODULE, BATTERY UNIT AND POWER RECEPTION COMMUNICATION MODULE
    7.
    发明申请
    COIL PRINTED CIRCUIT BOARD, POWER RECEPTION MODULE, BATTERY UNIT AND POWER RECEPTION COMMUNICATION MODULE 有权
    线圈印刷电路板，电源接收模块，电池单元和电源接收通信模块

    公开(公告)号：US20160094082A1

    公开(公告)日：2016-03-31

    申请号：US14891106

    申请日：2014-04-03

    Applicant: NITTO DENKO CORPORATION

    Inventor： Tadao OOKAWA ,  Emiko TANI ,  Akihito MATSUTOMI ,  Shotaro MASUDA

    IPC: H02J7/02 ,  H01F27/28 ,  H01F27/29 ,  H02J17/00

    CPC classification number: H02J50/12 ,  H01F27/2804 ,  H01F27/29 ,  H01F38/14 ,  H01F2027/2809 ,  H01M10/425 ,  H01M10/46 ,  H02J7/025 ,  H02J17/00 ,  H02J50/10 ,  H02J50/70

    Abstract: A first coil portion is formed on a first coil region of an upper surface, and a second coil portion is formed on a lower surface, of an insulating layer. A second terminal is formed at a position outside of the first coil region. One or plurality of intersection regions in which a path extending from an inner end of the first coil portion to the second terminal intersects with the first coil portion are provided on the upper surface. The first coil portion is parted in each intersection region. A second lead portion passes between one and the other portions of the first coil portion parted in each intersection region and extends from the inner end of the first coil portion to the second terminal. The first and second coil portions are connected in parallel to each other via a plurality of through holes formed in the insulating layer.

    Abstract translation: 第一线圈部分形成在上表面的第一线圈区域上，并且第二线圈部分形成在绝缘层的下表面上。 第二端子形成在第一线圈区域外侧的位置。 其中从第一线圈部分的内端延伸到第二端子的路径与第一线圈部分相交的一个或多个交叉区域设置在上表面上。 第一线圈部分分配在每个交叉区域中。 第二引线部分在第一线圈部分的一个和另一个部分之间通过，该第一线圈部分分配在每个交叉区域中并且从第一线圈部分的内端延伸到第二端子。 第一和第二线圈部分通过形成在绝缘层中的多个通孔彼此并联连接。

    LOW-DIELECTRIC BOARD MATERIAL
    8.
    发明公开
    LOW-DIELECTRIC BOARD MATERIAL 审中-公开

    公开(公告)号：US20240206059A1

    公开(公告)日：2024-06-20

    申请号：US18287344

    申请日：2022-04-14

    Applicant: NITTO DENKO CORPORATION

    Inventor： Taku IMAIZUMI ,  Akihito MATSUTOMI ,  Naoto NAGAMI

    IPC: H05K1/03 ,  C09D7/65 ,  C09D179/08

    CPC classification number: H05K1/0346 ,  C09D7/65 ,  C09D179/08 ,  H05K1/0353 ,  H05K2201/0116 ,  H05K2201/015 ,  H05K2201/0154

    Abstract: A low-dielectric board material includes a metal layer and a porous resin layer disposed on a one-side surface of the metal layer in the thickness direction. The porous resin layer includes a first region, a second region, a third region, and a fourth region that are located in sequence toward a direction away from the metal layer when the porous resin layer is equally divided into four in the thickness direction. The first region has a plurality of closed cells that are separate from each other in a resin matrix. The average of the aspect ratios AR of the plurality of closed cells in the first region is 0.80 or more and 1.20 or less. The average of the aspect ratios AR is a ratio (L1/L2) of a length L1 of a closed cell in a direction orthogonal to the thickness direction to a length L2 of the closed cell in the thickness direction in a cross-sectional view.

    WIRED CIRCUIT BOARD
    9.
    发明申请
    WIRED CIRCUIT BOARD 有权

    公开(公告)号：US20220312597A1

    公开(公告)日：2022-09-29

    申请号：US17641658

    申请日：2020-08-12

    Applicant: NITTO DENKO CORPORATION

    Inventor： Akihito MATSUTOMI ,  Masayuki HODONO

    IPC: H05K3/30 ,  H05K1/02

    Abstract: A wiring circuit board includes an insulating base layer, a conductive layer disposed on a one-side surface in a thickness direction of the insulating base layer, a cover insulating layer disposed on the one-side surface in the thickness direction of the insulating base layer to cover the conductive layer, and a shield layer disposed on the other-side surface in the thickness direction of the insulating base layer and both side surfaces in the width direction of the insulating base layer and on a one-side surface in the thickness direction of the cover insulating layer and both side surfaces in the width direction of the cover insulating layer. At least one of the insulating base layer and the cover insulating layer has a porous resin layer.

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