公开(公告)号：US11050388B2

公开(公告)日：2021-06-29

申请号：US16563728

申请日：2019-09-06

Applicant: NXP USA, INC.

Inventor： Lu Wang ,  Elie A. Maalouf ,  Joseph Staudinger ,  Jeffrey Kevin Jones

IPC: H03F1/07 ,  H03F1/02 ,  H01L23/66 ,  H03F1/56 ,  H03F3/195 ,  H03F3/24

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a Doherty amplifier module includes a substrate including a mounting surface, and further includes a first amplifier die, a second amplifier die, and a third amplifier die on the mounting surface. The first amplifier die is configured to amplify a first radio frequency (RF) signal along a first signal path, the second amplifier die is configured to amplify a second RF signal along a second signal path, and the third amplifier die is configured to amplify a third RF signal along a third signal path. A side of the first amplifier die including a first output terminal faces a side of the second amplifier die including a second output terminal. The second signal path is parallel to the first signal path, and the third signal path is orthogonal to the first and second signal paths.

公开(公告)号：US10742173B2

公开(公告)日：2020-08-11

申请号：US16139671

申请日：2018-09-24

Applicant: NXP USA, Inc.

Inventor： Elie Maalouf ,  Joseph Staudinger ,  Don Hayes

IPC: H03F1/02 ,  H03F1/30 ,  H03F3/193

Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that enables fast switching between an on state bias voltage and an off state bias voltage for the power amplifier. The bias controller can transition a low impedance switch to an on state to electrically couple a first electrode of a charge holding capacitor to an input of the power amplifier. The charge holding capacitor can be pre charged with the on state bias voltage to quickly provide the on state bias voltage to the power amplifier. The bias controller can also transition the low impedance switch to an off state to couple the input of the power amplifier to the off state bias voltage.

公开(公告)号：US10587226B2

公开(公告)日：2020-03-10

申请号：US15926937

申请日：2018-03-20

Applicant: NXP USA, Inc.

Inventor： Maruf Ahmed ,  Margaret A. Szymanowski ,  Joseph Staudinger

IPC: H03F3/191 ,  H03F1/02 ,  H03F1/56 ,  H03F3/195

Abstract: An amplifier device includes an input terminal, an output terminal, a first transistor having a control terminal and first and second current-carrying terminals, and a class-J circuit coupled between the second current-carrying terminal of the first transistor and the output terminal and configured to harmonically terminate the first transistor. The class-J circuit may include a first resonator, characterized by a first resonant frequency substantially equal to a second harmonic frequency. The first resonator may be coupled between the second current-carrying terminal and a voltage reference. A shunt inductor that is distinct from the first resonator may be coupled between the second current-carrying terminal and the voltage reference.

公开(公告)号：US20190181805A1

公开(公告)日：2019-06-13

申请号：US16274016

申请日：2019-02-12

Applicant: NXP USA, Inc.

Inventor： Abdulrhman M. S. Ahmed ,  Mario M. Bokatius ,  Paul R. Hart ,  Joseph Staudinger ,  Richard E, Sweeney

IPC: H03F1/02 ,  H04L7/00 ,  H03F3/21 ,  H03F3/60 ,  H03F3/68 ,  H03F3/189 ,  G06G7/10 ,  H03G1/00 ,  H04L27/22 ,  G06F13/42 ,  H03F3/19

CPC classification number: H03F1/0288 ,  G06F13/4282 ,  G06G7/10 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/602 ,  H03F3/68 ,  H03F2200/387 ,  H03F2200/438 ,  H03F2200/451 ,  H03F2203/21106 ,  H03F2203/21193 ,  H03G1/0088 ,  H03G2201/106 ,  H04L7/0079 ,  H04L27/22

Abstract: Embodiments of circuits for use with an amplifier that includes multiple amplifier paths include a first circuit and a second circuit in parallel with the first circuit. The first circuit includes a first input coupled to a first power divider output, a first output coupled to a first amplifier path of the multiple amplifier paths, and a first adjustable phase shifter and a first attenuator series coupled between the first input and the first output. The second circuit includes a second input coupled to a second power divider output, a second output coupled to a second amplifier path of the multiple amplifier paths, and a second adjustable phase shifter coupled between the second input and the second output.

公开(公告)号：US10103697B1

公开(公告)日：2018-10-16

申请号：US15790712

申请日：2017-10-23

Applicant: NXP USA, INC.

Inventor： Chun-Wei Chang ,  Joseph Staudinger

IPC: H04K1/02 ,  H04L25/03 ,  H04L25/49 ,  H03F3/24 ,  H03F3/19 ,  H04B1/04

Abstract: A multiphase transmitter including a reactive combiner for combining amplified pulse modulated signals generated by multiple power amplifiers of the transmitter. In some embodiments, the reactive combiner is configured to inhibit odd order harmonics of the amplified pulse modulated signals in a power efficient manner.

公开(公告)号：US12224713B2

公开(公告)日：2025-02-11

申请号：US17360821

申请日：2021-06-28

Applicant: NXP USA, Inc.

Inventor： Mark Pieter van der Heijden ,  Joseph Staudinger ,  Elie A. Maalouf

IPC: H03F1/02 ,  H01L23/66 ,  H03F3/195 ,  H03F3/21 ,  H03F3/213

Abstract: A device includes an integrated circuit (IC) die. The IC die includes a silicon germanium (SiGe) substrate, a first RF signal input terminal, a first RF signal output terminal, a first amplification path between the first RF signal input terminal and the first RF signal output terminal, a second RF signal input terminal, a second RF signal output terminal, and a second amplification path between the second RF signal input terminal and the second RF signal output terminal. The device includes a first power transistor die including a first input terminal electrically connected to the first RF signal output terminal and a second power transistor die including a second input terminal electrically connected to the second RF signal output terminal. The first amplification path can include two heterojunction bipolar transistors (HBTs) connected in a cascode configuration and the second amplification path can include two HBTs connected in a cascode configuration.

公开(公告)号：US11522498B2

公开(公告)日：2022-12-06

申请号：US16951781

申请日：2020-11-18

Applicant: NXP USA, Inc.

Inventor： Joseph Staudinger ,  Matthew Russell Greene ,  Edward Provo Wallis Horne ,  Johannes Lambertus Holt ,  Peter Zahariev Rashev

IPC: H03F1/02 ,  H03F3/195 ,  H03F1/56 ,  H03F3/60 ,  H03F3/24

Abstract: Aspects of the subject disclosure may include a Doherty amplifier that includes a carrier amplifier having an output terminal, an output network coupled to the output terminal, and a peaking amplifier, wherein the output network comprises a non-linear reactance component, and wherein the non-linear reactance component changes an effective impedance of a load presented to the carrier amplifier when the peaking amplifier is off. Other embodiments are disclosed.

公开(公告)号：US20210036663A1

公开(公告)日：2021-02-04

申请号：US16528536

申请日：2019-07-31

Applicant: NXP USA, Inc.

Inventor： Joseph Staudinger ,  Yu You ,  Donald Vernon Hayes

IPC: H03F1/30 ,  H03F3/04

Abstract: Embodiments of a temperature compensation circuit and a temperature compensated amplifier circuit are disclosed. In an embodiment, a temperature compensation circuit includes a bias reference circuit having serially connected transistor devices and a driver transistor device connected to the bias reference circuit. At least one of the serially connected transistor devices includes a resistor connected between two terminals of the at least one of the serially connected transistor devices. The driver transistor device is configured to generate a drive current based on a resistance value of the resistor.

公开(公告)号：US20200099345A1

公开(公告)日：2020-03-26

申请号：US16139761

申请日：2018-09-24

Applicant: NXP USA, Inc.

Inventor： Elie Maalouf ,  Joseph Staudinger ,  Don Hayes

IPC: H03F1/02

Abstract: Power amplifiers, amplifier systems, and related methods are disclosed herein. In one example embodiment, the amplifier system includes a bias controller that automatically sets a bias voltage of a power amplifier device by monitoring a reference device that is in a scaled relationship with the power amplifier device, and integrally is formed with the power amplifier device on a same semiconductor die. The bias controller can compare a voltage at an input to the reference device to a reference voltage, and then adjust a voltage at a control input of the reference device to a stabilized voltage that induces the reference device to drive the voltage at the input to the reference device equal to the reference voltage. Finally, the bias controller can transform, based on the scaled relationship, the stabilized voltage into a bias voltage applied to a control input of the power amplifier device.

公开(公告)号：US10530306B2

公开(公告)日：2020-01-07

申请号：US15952889

申请日：2018-04-13

Applicant: NXP USA, Inc.

Inventor： Ramanujam Srinidhi Embar ,  Tushar Sharma ,  Joseph Staudinger

IPC: H03F3/16 ,  H03F1/02 ,  H03F3/195 ,  H03F3/213 ,  H03F1/56 ,  H05K1/18 ,  H05K1/02 ,  H01L23/498 ,  H01L23/66 ,  H01L23/00

Abstract: Hybrid power amplifier circuits, modules, or systems, and methods of operating same, are disclosed herein. In one example embodiment, a hybrid power amplifier circuit includes a preliminary stage amplification device, a final stage amplification device, and intermediate circuitry at least indirectly coupling the preliminary stage amplification device and the final stage amplification device. The intermediate circuitry includes a low-pass circuit and a high-pass circuit, and the hybrid power amplifier circuit is configured to amplify a first signal component at a fundamental frequency. Due at least in part to the intermediate circuitry, a phase of a second signal component at a harmonic frequency that is a multiple of the fundamental frequency is shifted.