公开(公告)号：US06987054B2

公开(公告)日：2006-01-17

申请号：US10097817

申请日：2002-03-15

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L21/301

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

摘要翻译： 半导体器件在半导体芯片的主表面上具有树脂封装层，其上形成有多个凸起电极，其中半导体器件具有倒角表面或顶部边缘部分上的台阶表面，使得外部冲击或 施加到这种边缘部分的应力由台阶表面的倒角表面消散。

公开(公告)号：US20060030127A1

公开(公告)日：2006-02-09

申请号：US11249334

申请日：2005-10-14

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L21/78

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06455920B2

公开(公告)日：2002-09-24

申请号：US09160135

申请日：1998-09-25

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L23544

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06657282B2

公开(公告)日：2003-12-02

申请号：US10097816

申请日：2002-03-15

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L23544

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06471501B1

公开(公告)日：2002-10-29

申请号：US09272754

申请日：1999-03-18

申请人： Yasuhiro Shinma ,  Muneharu Morioka ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Tadashi Uno ,  Hirohisa Matsuki ,  Kenichi Nagashige

发明人： Yasuhiro Shinma ,  Muneharu Morioka ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Tadashi Uno ,  Hirohisa Matsuki ,  Kenichi Nagashige

IPC分类号： B29C4514

CPC分类号： B29C43/36 ,  B29C43/18 ,  B29C2043/5858 ,  H01L21/565 ,  H01L2924/0002 ,  H01L2924/00

摘要： A mold for press-molding a resin package body includes a lower mold and an upper mold, wherein the upper mold includes a press plate held in a tiltable manner with respect to a press head used for urging the upper mold against the lower mold and a lock mechanism for locking the press plate. The lower mold includes an inner die carrying a semiconductor device and a resin tablet and an outer die surrounding the inner die in a manner movable up and down with respect to the inner die. In operation, the press plate is first engaged with the outer die in the unlocked state to achieve an exact parallelism with respect to the inner die, and after locking the press plate and melting the resin tablet, the press plate is urged further toward the inner die while simultaneously lowering the outer die such that the space formed by the lower die, outer die and the press plate for accommodating a semiconductor chip is collapsed.

摘要翻译： 一种用于模制树脂封装体的模具包括下模具和上模具，其中上模具包括相对于用于将上模压靠在下模上的压头可倾斜地保持的压板，以及 用于锁定压板的锁定机构。 下模包括以相对于内模上下移动的方式承载半导体装置和树脂片的内模和围绕内模的外模。 在操作中，压板首先在解锁状态下与外模接合，以实现相对于内模的精确平行度，并且在锁定压板并熔化树脂片之后，压板进一步向内 同时降低外模，使得由下模，外模和用于容纳半导体芯片的压板形成的空间被折叠。

公开(公告)号：US07556985B2

公开(公告)日：2009-07-07

申请号：US11249334

申请日：2005-10-14

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L21/00

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

摘要翻译： 半导体器件在半导体芯片的主表面上具有树脂封装层，其上形成有多个凸起电极，其中半导体器件具有倒角表面或顶部边缘部分上的台阶表面，使得外部冲击或 施加到这种边缘部分的应力由台阶表面的倒角表面消散。

公开(公告)号：US07064047B2

公开(公告)日：2006-06-20

申请号：US10893297

申请日：2004-07-19

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L23/04

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06784542B2

公开(公告)日：2004-08-31

申请号：US10618721

申请日：2003-07-15

申请人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

发明人： Norio Fukasawa ,  Hirohisa Matsuki ,  Kenichi Nagashige ,  Yuzo Hamanaka ,  Muneharu Morioka

IPC分类号： H01L2304

CPC分类号： H01L23/562 ,  H01L21/56 ,  H01L21/563 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L24/29 ,  H01L29/0657 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/10158 ,  H01L2924/14 ,  H01L2924/15311 ,  Y10S438/92 ,  Y10S438/978 ,  H01L2924/3512 ,  H01L2924/00

摘要： A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.

公开(公告)号：US06469370B1

公开(公告)日：2002-10-22

申请号：US09495332

申请日：2000-02-01

申请人： Toshimi Kawahara ,  Hirohisa Matsuki ,  Yasuhiro Shinma ,  Yoshiyuki Yoneda ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Kenichi Nagashige ,  Takashi Hozumi

发明人： Toshimi Kawahara ,  Hirohisa Matsuki ,  Yasuhiro Shinma ,  Yoshiyuki Yoneda ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Kenichi Nagashige ,  Takashi Hozumi

IPC分类号： H01L2348

CPC分类号： H01L24/10 ,  H01L23/3114 ,  H01L24/02 ,  H01L24/06 ,  H01L24/13 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16145 ,  H01L2224/274 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/731 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： In a semiconductor device of the present invention and a production method thereof, an electronic circuit is provided in a semiconductor substrate, the electronic circuit having terminals. An internal wiring pattern is provided in the substrate, the internal wiring pattern being connected to the electronic circuit terminals. A protective layer is provided on the substrate, the protective layer covering the substrate. Vias are provided on the substrate so as to project from the protective layer, the vias being connected to the internal wiring pattern at arbitrary positions on the substrate. An external wiring pattern is provided on the protective layer, the external wiring pattern being connected to the vias. Projection electrodes are connected to the external wiring pattern, the projection electrodes having a predetermined height above the external wiring pattern. An enclosure layer of a resin material is provided on the protective layer, the enclosure layer covering sides of the projection electrodes and external surfaces of the external wiring pattern.

摘要翻译： 在本发明的半导体器件及其制造方法中，电子电路设置在半导体衬底中，该电子电路具有端子。 内部布线图案设置在基板中，内部布线图案连接到电子电路端子。 保护层设置在基板上，保护层覆盖基板。 在基板上设置通孔，从保护层突出，通孔在基板的任意位置连接到内部布线图案。 外部布线图案设置在保护层上，外部布线图形与通孔相连。 投射电极连接到外部布线图案，突起电极在外部布线图案上方具有预定的高度。 树脂材料的外壳层设置在保护层上，外壳层覆盖突起电极的侧面和外部布线图案的外表面。

公开(公告)号：US06511620B1

公开(公告)日：2003-01-28

申请号：US09511496

申请日：2000-02-23

申请人： Toshimi Kawahara ,  Hirohisa Matsuki ,  Yasuhiro Shinma ,  Yoshiyuki Yoneda ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Kenichi Nagashige ,  Takashi Hozumi

发明人： Toshimi Kawahara ,  Hirohisa Matsuki ,  Yasuhiro Shinma ,  Yoshiyuki Yoneda ,  Norio Fukasawa ,  Yuzo Hamanaka ,  Kenichi Nagashige ,  Takashi Hozumi

IPC分类号： B29C3318

CPC分类号： B29C33/0055 ,  B29C33/68 ,  B29C43/18 ,  B29C43/36 ,  B29C43/3642 ,  B29C43/56 ,  H01L21/566 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of producing semiconductor devices which have an excellent separability from a metal mold after resin encapsulation and thus eliminates the need to clean the metal mold. A metal mold for producing such semiconductor devices is also provided. According to the method of the present invention, the metal mold is first opened, and two separation sheets are disposed on dividing surfaces including cavity forming surfaces of a first metal mold and a second metal mold. A substrate is then placed on one of the separation sheets, with its semiconductor chip formed surface facing the second metal mold. An encapsulation resin is provided on the substrate placed on one of the separation sheets. The metal mold in a heated state is closed and pressed to form a resin layer for encapsulating electrodes formed on the substrate. The metal mold is again opened, and the resin-encapsulated substrate is taken out of the metal mold. After the separation sheets are removed, the substrate is divided into individual semiconductor devices.

摘要翻译： 一种制造半导体器件的方法，其在树脂封装之后与金属模具具有优异的可分离性，因此不需要清洁金属模具。 还提供了用于制造这种半导体器件的金属模具。 根据本发明的方法，首先打开金属模具，并且在包括第一金属模具和第二金属模具的空腔形成表面的分割表面上设置两个分离片。 然后将基板放置在一个分离片上，其半导体芯片形成表面面向第二金属模具。 在放置在一个分离片上的基板上设置封装树脂。 将处于加热状态的金属模封闭并压制以形成用于封装形成在基板上的电极的树脂层。 再次打开金属模具，将树脂封装的基板从金属模具中取出。 在分离片被去除之后，将衬底分成单独的半导体器件。