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公开(公告)号：US11765478B2
公开(公告)日：2023-09-19
申请号：US17078427
申请日：2020-10-23
Applicant: OLYMPUS CORPORATION
Inventor： Masashi Saito , Yoshio Hagihara
IPC: H04N1/00 , A61B1/00 , G02B23/24 , H04N25/709 , H03L7/089 , H03L7/099 , H04N7/18 , H03L7/10 , A61B1/05
CPC classification number: H04N25/709 , A61B1/00004 , G02B23/24 , H03L7/0891 , H03L7/099 , H03L7/104 , H04N7/18 , A61B1/05
Abstract: In an imaging system, a differential signal transmission circuit is configured to output a first signal to a first signal line in an image output period and is configured to output a second signal to a second signal line in the image output period. The first signal and the second signal are included in a differential signal. A signal output circuit is configured to output a second clock signal to the first signal line in a blanking period different from the image output period and is configured to output a second control signal to the second signal line in the blanking period. In a PLL, connection between a charge pump and a loop filter is controlled on the basis of the second control signal output to the second signal line.
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公开(公告)号：US20210044770A1
公开(公告)日：2021-02-11
申请号：US17078427
申请日：2020-10-23
Applicant: OLYMPUS CORPORATION
Inventor： Masashi Saito , Yoshio Hagihara
Abstract: In an imaging system, a differential signal transmission circuit is configured to output a first signal to a first signal line in an image output period and is configured to output a second signal to a second signal line in the image output period. The first signal and the second signal are included in a differential signal. A signal output circuit is configured to output a second clock signal to the first signal line in a blanking period different from the image output period and is configured to output a second control signal to the second signal line in the blanking period. In a PLL, connection between a charge pump and a loop filter is controlled on the basis of the second control signal output to the second signal line.
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公开(公告)号：US20180220879A1
公开(公告)日：2018-08-09
申请号：US15939740
申请日：2018-03-29
Applicant: OLYMPUS CORPORATION
Inventor： Takatoshi Igarashi , Noriyuki Fujimori , Makoto Ono , Masashi Saito , Satoru Adachi , Nana Akahane , Takanori Tanaka , Katsumi Hosogai
IPC: A61B1/05 , A61B1/045 , A61B1/06 , A61B1/00 , H04N5/378 , H04N5/345 , H04N5/376 , H04N7/10 , H01L27/146 , H01L21/66
CPC classification number: A61B1/05 , A61B1/00195 , A61B1/045 , A61B1/063 , A61B1/0638 , H01L22/32 , H01L25/065 , H01L25/07 , H01L25/16 , H01L25/18 , H01L27/14 , H01L27/146 , H01L27/14618 , H01L27/14634 , H01L27/14636 , H01L27/1469 , H04N5/2256 , H04N5/23203 , H04N5/345 , H04N5/3765 , H04N5/378 , H04N5/379 , H04N7/102 , H04N2005/2255
Abstract: An imaging device includes: a first chip including a light receiving unit, and a read circuit; a second chip including a timing control circuit, an A/D conversion circuit, and a cable transmission circuit; and a connection unit configured to connect the first and the second chips. The read circuit includes a column read circuit and a horizontal selection circuit, and a vertical selection circuit. The connection unit of the first chip is provided in a first area along a side of the rectangular light receiving unit, and in a second area adjacent to the column read circuit, the horizontal selection circuit, and the vertical selection circuit. The connection unit of the second chip is provided in a third area around the timing control circuit, the A/D conversion circuit, and the cable transmission circuit and in a fourth area adjacent to the timing control circuit and the A/D conversion circuit.
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公开(公告)号：US09813645B2
公开(公告)日：2017-11-07
申请号：US15251176
申请日：2016-08-30
Applicant: OLYMPUS CORPORATION
Inventor： Makoto Ono , Nana Akahane , Masashi Saito , Yoshio Hagihara , Susumu Yamazaki
CPC classification number: H04N5/357 , A61B1/00009 , A61B1/045 , A61B1/05 , G02B23/2484 , H04N5/3655 , H04N5/378 , H04N2005/2255
Abstract: An image sensor includes: photoelectric conversion elements configured to receive light and accumulate a charge corresponding to an amount of received light; an imaging signal generating unit that converts the charge accumulated in each photoelectric conversion element into a voltage to generate an imaging signal; and a reference signal generating unit that generates a reference signal having a fluctuation component with a same phase as the imaging signal. The imaging signal generating unit includes: a conversion circuit that converts the charge accumulated in each photoelectric conversion element into the imaging signal; a noise eliminating circuit that eliminates a noise component included in the imaging signal; and an output circuit that outputs the imaging signal from the conversion circuit. The reference signal generating unit includes a circuit having a same structure as that of at least one of the conversion circuit, the noise eliminating circuit, and the output circuit.
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公开(公告)号：US09392204B2
公开(公告)日：2016-07-12
申请号：US14747265
申请日：2015-06-23
Applicant: OLYMPUS CORPORATION
Inventor： Masashi Saito
IPC: H04N5/378 , H04N5/374 , H04N5/357 , H04N5/3745 , H01L27/146
CPC classification number: H04N5/378 , H01L27/14634 , H01L27/14636 , H04N5/3577 , H04N5/374 , H04N5/37455 , H04N2209/041
Abstract: An image capturing device includes a first substrate and a second substrate that are stacked in stages; a pixel section in the first substrate in which a plurality of pixels outputting signals according to incident physical quantities are disposed in a matrix form; a first AD conversion circuit in the first substrate for every column or every plurality of columns of pixels performing AD conversion on signals output by pixels; a connector that electrically connects the first substrate and the second substrate; a second AD conversion circuit in the second substrate for every column or every plurality of columns of pixels and performing AD conversion on signals output by pixels and inputting through the connector; and a controller in the first substrate or the second substrate and supplying a control signal to the first AD conversion circuit and the second AD conversion circuit.
Abstract translation: 图像捕获装置包括分阶段堆叠的第一基板和第二基板; 第一基板中的像素部分，其中根据入射物理量输出信号的多个像素以矩阵形式布置; 每个列的第一基板中的第一AD转换电路或对由像素输出的信号执行AD转换的每多列像素; 电连接第一基板和第二基板的连接器; 用于每列或每多列像素的第二基板中的第二AD转换电路，对由像素输出的信号执行AD转换并通过连接器输入; 以及第一基板或第二基板中的控制器，并向第一AD转换电路和第二AD转换电路提供控制信号。
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Patent Agency Ranking
公开(公告)号：US20130250152A1
公开(公告)日：2013-09-26
申请号：US13848450
申请日：2013-03-21
Applicant: OLYMPUS CORPORATION
Inventor： Masashi Saito
IPC: H04N5/374
Abstract: An imaging device includes a plurality of first pixels, each of which outputs a first pixel signal, a plurality of second pixels, each of which outputs a second pixel signal, a ramp wave generator that outputs a ramp signal that monotonously increases or monotonously decreases over time, a phase shift pulse generator that outputs first to n-th phase shift pulse signals, a first pixel latch group that latches the first to n-th phase shift pulse signals when the first pixel signal and the ramp signal have a predetermined relationship, a second pixel latch group that latches the first to n-th phase shift pulse signals when the second pixel signal and the ramp signal have the predetermined relationship, first to n-th power source lines to supply a power source and first to n-th phase shift pulse supply lines to supply the phase shift pulses.
Abstract translation: 一种成像装置包括多个第一像素，每个第一像素输出第一像素信号，多个第二像素，每个第二像素输出第二像素信号;斜坡波发生器，其输出单调增加或单调减小的斜坡信号; 时间，输出第一至第n相移脉冲信号的相移脉冲发生器，当第一像素信号和斜坡信号具有预定关系时，锁存第一至第n相移脉冲信号的第一像素锁存器组， 第二像素锁存器组，当第二像素信号和斜坡信号具有预定关系时，锁存第一至第n相移脉冲信号，第一至第n电源线提供电源和第一至第n 相移脉冲供给线以提供相移脉冲。
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公开(公告)号：US20230024742A1
公开(公告)日：2023-01-26
申请号：US17957013
申请日：2022-09-30
Applicant: OLYMPUS CORPORATION
Inventor： Nana Akahane , Masashi Saito , Takeshi Doh
IPC: A61B1/00
Abstract: An imaging element includes: a pixel board including a light receiver including plural pixels, each pixel being configured to generate an imaging signal; a circuit board including a functional circuit, the pixel board being layered on the circuit board; plural wiring portions configured to electrically connect the pixel board and the circuit board to each other and electrically transmit signals between respective layers; a terminal provided on the circuit board, the terminal being electrically connected to each of the plural wiring portions, the terminal being configured to output the imaging signal to an outside of the terminal or receive an external signal from the outside of the terminal; and a switch configured to output, by selective switching, at least one of the imaging signal and an internal signal generated at the circuit board, to the terminal.
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公开(公告)号：US10542226B2
公开(公告)日：2020-01-21
申请号：US16152629
申请日：2018-10-05
Applicant: OLYMPUS CORPORATION
Inventor： Takanori Tanaka , Masashi Saito , Takatoshi Igarashi , Satoru Adachi , Katsumi Hosogai , Nana Akahane
Abstract: An imaging element includes: a pixel chip where a pixel unit and a vertical selecting unit are arranged, the pixel unit including plural pixels that are arranged in a two-dimensional matrix, the pixels being configured to generate and output imaging signals; a transmission chip where at least a power source unit and a transmission unit are arranged; plural capacitative chips, each capacitative chip having capacitance functioning as a bypass condenser for a power source in the power source unit; and plural connecting portions configured to electrically connect the pixel chip, the transmission chip, and the capacitative chip respectively to another chip. The transmission chip is layered and connected at a back surface side of the pixel chip. The capacitative chips are layered and connected at a back surface side of the transmission chip. The connecting portions are arranged so as to overlap one another.
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公开(公告)号：US10456022B2
公开(公告)日：2019-10-29
申请号：US15939740
申请日：2018-03-29
Applicant: OLYMPUS CORPORATION
Inventor： Takatoshi Igarashi , Noriyuki Fujimori , Makoto Ono , Masashi Saito , Satoru Adachi , Nana Akahane , Takanori Tanaka , Katsumi Hosogai
IPC: A61B1/05 , H01L25/065 , H01L25/07 , H01L25/16 , H01L25/18 , H01L27/14 , H01L27/146 , H04N5/378 , A61B1/00 , A61B1/045 , A61B1/06 , H01L21/66 , H04N5/345 , H04N5/376 , H04N7/10 , H04N5/225 , H04N5/232 , H04N5/369
Abstract: An imaging device includes: a first chip including a light receiving unit, and a read circuit; a second chip including a timing control circuit, an A/D conversion circuit, and a cable transmission circuit; and a connection unit configured to connect the first and the second chips. The read circuit includes a column read circuit and a horizontal selection circuit, and a vertical selection circuit. The connection unit of the first chip is provided in a first area along a side of the rectangular light receiving unit, and in a second area adjacent to the column read circuit, the horizontal selection circuit, and the vertical selection circuit. The connection unit of the second chip is provided in a third area around the timing control circuit, the A/D conversion circuit, and the cable transmission circuit and in a fourth area adjacent to the timing control circuit and the A/D conversion circuit.
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公开(公告)号：US09584748B2
公开(公告)日：2017-02-28
申请号：US14717710
申请日：2015-05-20
Applicant: OLYMPUS CORPORATION
Inventor： Masashi Saito
CPC classification number: H04N5/378 , H03M1/0624 , H03M1/0845 , H03M1/123 , H03M1/56 , H04N5/37457 , H04N5/3765
Abstract: A solid-state imaging apparatus includes an imaging section in which a plurality of pixels, each of which has a photoelectric conversion element, are disposed in a matrix; a clock generation section; a reference signal generation section configured to generate a reference signal whose amplitude increases or decreases with the passage of time; a comparison section disposed corresponding to a column in an array of the plurality of pixels; a latch section disposed corresponding to the comparison section and configured to latch logic states of the plurality of phase signals; and a latch control section disposed corresponding to the comparison section, wherein the comparison section includes a differential amplifier, a current output element, and a third transistor, and wherein the comparison section outputs a second comparison signal based on the current output from the current output element after the second timing.
Abstract translation: 一种固态成像装置，包括：成像部，其中，具有光电转换元件的多个像素配置成矩阵状; 时钟生成部分; 参考信号生成部，被配置为生成随着时间的推移振幅增大或减小的参照信号; 对应于所述多个像素的阵列中的列的比较部分; 锁存部分，其对应于所述比较部分设置并且被配置为锁存所述多个相位信号的逻辑状态; 以及对应于所述比较部分设置的锁存器控制部分，其中所述比较部分包括差分放大器，电流输出元件和第三晶体管，并且其中所述比较部分基于从所述电流输出的电流输出输出第二比较信号 元素之后的第二个定时。
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