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25 条记录 (耗时 0.03 秒)

    Smart-cut of a thin foil of poruous Ni from a Si wafer
    3.
    发明申请
    Smart-cut of a thin foil of poruous Ni from a Si wafer 审中-公开
    从Si晶圆上精细切割出一条薄薄的薄膜

    公开(公告)号：US20060234079A1

    公开(公告)日：2006-10-19

    申请号：US11395394

    申请日：2006-03-30

    申请人： Xi Zhang ,  King-Ning Tu

    发明人： Xi Zhang ,  King-Ning Tu

    IPC分类号： B05D1/18 ,  B05D3/00 ,  B05D1/32 ,  B21C37/00

    CPC分类号： H01L21/76259 ,  C23C18/54 ,  Y10T428/12431

    摘要： The present invention is a method of fabricating a self-peeling nickel foil from a silicon wafer. The method includes forming a template of silicon by electrochemically etching a portion of the Si wafer to create a porous Si portion with pores of a desired depth. Then electrolessly plating nickel into the template, wherein the porous silicon portion is converted into a porous nickel portion and continuing the electroless plating until the internal tensile stress at an interface of the porous nickel portion and the silicon wafer is great enough to self-peel the porous nickel portion from the silicon wafer creating a nickel foil.

    摘要翻译： 本发明是从硅晶片制造自剥离镍箔的方法。 该方法包括通过电化学蚀刻Si晶片的一部分以形成具有期望深度的孔的多孔Si部分来形成硅模板。 然后将镍无电镀镍到模板中，其中将多孔硅部分转化为多孔镍部分并继续化学镀，直到多孔镍部分和硅晶片的界面处的内部拉伸应力足够大以自剥离 来自硅晶片的多孔镍部分产生镍箔。

    Dopant activation of heavily-doped semiconductor by high current densities
    4.
    发明授权
    Dopant activation of heavily-doped semiconductor by high current densities 失效
    通过高电流密度掺杂重掺杂半导体的掺杂剂激活

    公开(公告)号：US5882953A

    公开(公告)日：1999-03-16

    申请号：US679136

    申请日：1996-07-12

    申请人： King-Ning Tu ,  Jia-Sheng Huang

    发明人： King-Ning Tu ,  Jia-Sheng Huang

    IPC分类号： H01L21/265 ,  H01L21/326 ,  H01L21/479 ,  H01L21/44 ,  H01L21/425

    CPC分类号： H01L21/326 ,  H01L21/2652 ,  H01L21/479

    摘要： Dopant activation in heavily boron doped p.sup.+ --Si is achieved by applying electric current of high density. The p.sup.+ --Si was implanted by a 40 KeV BF.sup.2+ at an ion intensity 5.multidot.10.sup.15 ions per cm.sup.2 and annealed at 900.degree. C. for 30 minutes to obtain a partial boron activation according to conventional processing steps. To obtain additional activation and higher conductivity, current was gradually applied according to the invention to a current density of approximately 5.times.10.sup.6 A/cm.sup.2 was realized. The resistance of the p.sup.+ --Si gradually increases and then decreases with a precipitous drop at a threshold current. The resistance was reduced by factor of 5 to 18 times and was irreversible if an activation current threshold was reached or exceeded. The high-current-density-dopant activation occurs at room temperature.

    摘要翻译： 通过施加高密度电流来实现重掺硼p + -Si中的掺杂剂活化。 用40KeV BF2 +离子强度5×10 15个离子/ cm 2注入p + -Si，并在900℃退火30分钟，根据常规的加工步骤获得部分硼活化。 为了获得额外的活化和较高的导电性，根据本发明逐渐地施加电流，达到约5×10 6 A / cm 2的电流密度。 p + -Si的电阻逐渐增加，然后随着阈值电流的急剧下降而减小。 电阻降低5至18倍，如果达到或超过激活电流阈值，则不可逆。 高电流密度 - 掺杂剂激活发生在室温下。

    Formation of 3-dimensional silicon silicide structures
    5.
    发明授权
    Formation of 3-dimensional silicon silicide structures 失效
    三维硅化硅结构的形成

    公开(公告)号：US5463254A

    公开(公告)日：1995-10-31

    申请号：US279669

    申请日：1994-07-25

    申请人： Subramanian S. Iyer ,  Richard D. Thompson ,  King-Ning Tu

    发明人： Subramanian S. Iyer ,  Richard D. Thompson ,  King-Ning Tu

    IPC分类号： H01L21/20 ,  H01L21/3205 ,  H01L21/74 ,  H01L23/52 ,  H01L23/535 ,  H01L21/283 ,  H01L23/48

    CPC分类号： H01L21/743 ,  H01L23/535 ,  H01L2924/0002

    摘要： An epitaxial conductor and a method for forming buried conductor patterns is described incorporating a layer of single crystalline silicon, a pattern formed therein such as a trench, a layer of metal silicide epitaxial formed on the bottom surface of the pattern or trench, a layer of silicon epitaxially formed thereover, and a layer of metal silicide epitaxially formed over the silicon layer. The invention overcomes the problem of twinning defects in the top surface of epitaxial silicide layers.

    摘要翻译： 描述了外延导体和形成掩埋导体图案的方法，其结合了单晶硅层，形成在其中的图案，例如沟槽，形成在图案或沟槽的底表面上的金属硅化物层，一层 在其上外延形成的硅，以及在硅层上外延形成的金属硅化物层。 本发明克服了外延硅化物层的上表面的孪晶缺陷的问题。

    Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications
    6.
    发明授权
    Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications 有权
    在射频应用的半导体衬底中制造高导电区域的方法

    公开(公告)号：US07772117B2

    公开(公告)日：2010-08-10

    申请号：US11626255

    申请日：2007-01-23

    申请人： King-Ning Tu ,  Ya-Hong Xie ,  Chang-Ching Yeh

    发明人： King-Ning Tu ,  Ya-Hong Xie ,  Chang-Ching Yeh

    IPC分类号： H01L21/00

    CPC分类号： H01L21/76 ,  H01L23/552 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    摘要： Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that allows for the subsequent formation of metallized posts and metallized moats in the porous regions; and (2) a second structure includes staggered deep V-grooves or trenches etched into an Si substrate, or some other semiconductor substrate, from the front and/or the back of the substrate, wherein these V-grooves and trenches are filled or coated with metal to form the metallized moats.

    摘要翻译： 用于在射频应用的半导体衬底中制造高导电区域的方法用于制造两种结构：（1）第一结构包括遍及Si衬底的整个厚度的多孔Si（硅）区域，其允许随后形成金属化柱 和多孔区域中的金属化护城河; 和（2）第二结构包括从衬底的前部和/或背面蚀刻到Si衬底或某些其它半导体衬底中的交错的深V形槽或沟槽，其中这些V形槽和沟槽被填充或涂覆 用金属形成金属化的护城河。

    Rare earth silicide Schottky barriers
    8.
    发明授权
    Rare earth silicide Schottky barriers 失效
    稀土硅化物肖特基势垒

    公开(公告)号：US4394673A

    公开(公告)日：1983-07-19

    申请号：US191565

    申请日：1980-09-29

    申请人： Richard D. Thompson ,  Boryeu Tsaur ,  King-Ning Tu

    发明人： Richard D. Thompson ,  Boryeu Tsaur ,  King-Ning Tu

    IPC分类号： H01L29/80 ,  H01L21/28 ,  H01L21/285 ,  H01L21/329 ,  H01L21/338 ,  H01L29/47 ,  H01L29/812 ,  H01L29/872 ,  H01L29/48

    CPC分类号： H01L29/47 ,  H01L21/28537

    摘要： In the practice of this disclosure, rare earth disilicide low Schottky barriers (.ltorsim.0.4 eV) are used as low resistance contacts to n-Si. Further, high resistance contacts to p-Si (Schottky barrier of .gtorsim.0.7 eV) are also available by practice of this disclosure. A method is disclosed for forming contemporaneously high (.gtorsim.0.8 eV) and low (.ltorsim.0.4 eV) energy Schottky barriers on an n-doped silicon substrate. Illustratively, the high energy Schottky barrier is formed by reacting platinum or iridium with silicon; the low energy Schottky barrier is formed by reacting a rare earth with silicon to form a disilicide. Illustratively, a double layer of Pt/on W is an effective diffusion barrier on Gd and prevents the Gd from oxidation.

    摘要翻译： 在本公开的实践中，稀土二硅化物低肖特基势垒（约0.4eV）用作n-Si的低电阻接触。 此外，本公开的实践也可以获得与p-Si（APPROXGREATER 0.7eV的肖特基势垒）的高电阻接触。 公开了一种用于在n掺杂硅衬底上形成同时高（APPROXGREATER 0.8eV）和低（近似0.4eV）能量肖特基势垒的方法。 说明性地，通过使铂或铱与硅反应形成高能肖特基势垒; 通过使稀土与硅反应形成二硅化物形成低能肖特基势垒。 说明性的是，双层Pt / on W是Gd上的有效扩散阻挡层，并防止Gd氧化。

    Specimen box for electron microscope
    9.
    发明授权
    Specimen box for electron microscope 有权
    电子显微镜样品盒

    公开(公告)号：US08575566B2

    公开(公告)日：2013-11-05

    申请号：US13541016

    申请日：2012-07-03

    申请人： Chih Chen ,  King-Ning Tu

    发明人： Chih Chen ,  King-Ning Tu

    IPC分类号： G21K5/08

    CPC分类号： H01J37/20 ,  H01J2237/2003

    摘要： The present invention relates to a specimen box for an electron microscope, which comprises a first substrate, a second substrate, and a metal adhesion layer. The first substrate has a first surface, a second surface, a first concave, and one or more first through holes, wherein the first through hole penetrates through the first substrate. The second substrate has a third surface, a forth surface, and a second concave. Besides, the metal adhesion layer is disposed between the first substrate and the second substrate to form a space for a specimen placed therein. In addition, the specimen box of the present invention further comprises one or more plugs. When the plug is assembled into the first through hole to seal the specimen box, the in-situ observation can be accomplished by using an electron microscope.

    摘要翻译： 本发明涉及一种用于电子显微镜的标本盒，其包括第一基底，第二基底和金属粘合层。 第一基板具有第一表面，第二表面，第一凹部和一个或多个第一通孔，其中第一通孔穿过第一基板。 第二基板具有第三表面，第四表面和第二凹部。 此外，金属粘合层设置在第一基板和第二基板之间，以形成放置在其中的试样的空间。 此外，本发明的标签盒还包括一个或多个插头。 当插头组装到第一通孔中以密封标本盒时，可以通过使用电子显微镜来实现原位观察。

    SPECIMEN BOX FOR ELECTRON MICROSCOPE
    10.
    发明申请
    SPECIMEN BOX FOR ELECTRON MICROSCOPE 有权
    电子显微镜样品盒

    公开(公告)号：US20130009071A1

    公开(公告)日：2013-01-10

    申请号：US13450271

    申请日：2012-04-18

    申请人： Chih CHEN ,  King-Ning Tu

    发明人： Chih CHEN ,  King-Ning Tu

    IPC分类号： H01J37/16

    CPC分类号： H01J37/20 ,  H01J2237/2003

    摘要： The present invention relates to a specimen box for an electron microscope, comprising a first substrate, a second substrate, one or more photoelectric elements, and a metal adhesion layer. The first substrate has a first surface, a second surface, a first concave, and one or more first through holes, wherein the first through holes penetrate through the first substrate. The second substrate has a third surface, a forth surface, and a second concave. The photoelectric element is disposed between the first substrate and the second substrate. In addition, the metal adhesion layer is disposed between the first substrate and the second substrate to form a space for a specimen contained therein. Besides, the present specimen box further comprises one or more plugs. When the plugs are assembled into the first through holes to seal the specimen box, the in-situ observation can be accomplished by using the electron microscope.

    摘要翻译： 本发明涉及一种用于电子显微镜的标本盒，包括第一基底，第二基底，一个或多个光电元件和金属粘合层。 第一基板具有第一表面，第二表面，第一凹部和一个或多个第一通孔，其中第一通孔穿过第一基板。 第二基板具有第三表面，第四表面和第二凹部。 光电元件设置在第一基板和第二基板之间。 此外，金属粘合层设置在第一基板和第二基板之间，以形成其中容纳的样本的空间。 此外，本标本箱还包括一个或多个插头。 当插头组装到第一通孔中以密封标本盒时，可以通过使用电子显微镜来实现原位观察。