公开(公告)号：US20130082764A1

公开(公告)日：2013-04-04

申请号：US13250677

申请日：2011-09-30

申请人： Paul Penzes ,  Love Kothari ,  Ajat Hukkoo ,  Mark Fullerton ,  Veronica Alarcon ,  Zhongmin Zhang ,  Kerry Alan Thompson ,  Russell Radke

发明人： Paul Penzes ,  Love Kothari ,  Ajat Hukkoo ,  Mark Fullerton ,  Veronica Alarcon ,  Zhongmin Zhang ,  Kerry Alan Thompson ,  Russell Radke

IPC分类号： G05F3/02 ,  H03B1/00 ,  G11C5/14

CPC分类号： G11C29/56 ,  G11C2029/5602

摘要： An apparatus and method are disclosed to combine pad functionality in an integrated circuit. A power, ground, or signal pad is connected to a power, ground, or signal source, respectively. The power, ground, or signal pad is additionally connected to an additional signal source, such as automatic test equipment in a testing environment. By temporarily disconnecting either the power, ground, or signal source, from the functional block within the integrated circuit to which the source is delivered, the same pad may pass in another signal to other portions of the integrated circuit. In the alternative, the same pad may pass in another signal to other portions of the integrated circuit without disconnecting the original signal by coupling the additional signal over the original signal. Further, combining pad functionality enables reuse of an input pad as an output pad for signals originating from within the integrated circuit.

摘要翻译： 公开了一种在集成电路中组合焊盘功能的装置和方法。 电源，接地或信号焊盘分别连接到电源，接地或信号源。 电源，接地或信号焊盘另外连接到附加信号源，例如测试环境中的自动测试设备。 通过将电源，接地或信号源暂时断开与源传输到的集成电路内的功能块，同一焊盘可以将另一个信号传递到集成电路的其他部分。 在替代方案中，相同的焊盘可以将另一个信号传递到集成电路的其它部分，而不会通过在原始信号上耦合附加信号来断开原始信号。 此外，组合焊盘功能使得可以将输入焊盘重新用作来自集成电路内的信号作为输出焊盘。

公开(公告)号：US09225343B2

公开(公告)日：2015-12-29

申请号：US13338001

申请日：2011-12-27

申请人： Love Kothari ,  Mark Fullerton ,  Rajesh Rajan ,  Veronica Alarcon

发明人： Love Kothari ,  Mark Fullerton ,  Rajesh Rajan ,  Veronica Alarcon

IPC分类号： H04L7/02 ,  H03L7/08 ,  H03K3/03 ,  H03K3/037 ,  H03K19/01 ,  G06F12/14 ,  G06F21/44 ,  H03K5/13 ,  H03L7/097 ,  H03L7/099 ,  G06F1/32 ,  G06F1/26 ,  H03K5/00

CPC分类号： H03L7/0802 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3228 ,  G06F12/14 ,  G06F21/44 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/037 ,  H03K3/0375 ,  H03K5/133 ,  H03K19/01 ,  H03K2005/00019 ,  H03K2005/00026 ,  H03K2005/00058 ,  H03L7/097 ,  H03L7/0997 ,  H01L2924/00

摘要： An electronics device is disclosed that reduces latency resulting from communication between a first electronics component operating based on a fast clock and a second electronics component operating based on a slow clock reduces communication latency. When transferring the data from the first component to the second, the data is written into a buffer using the first clock, and then extracted by the second component using the second clock. Alternatively, when transferring the data from the second component to the first component, the first component reads the data from the second component and monitors whether the data was extracted during a relevant edge of the second clock signal, in which case the first component again extracts the data from the second component.

摘要翻译： 公开了一种电子设备，其减少由基于快速时钟操作的第一电子元件与基于慢时钟操作的第二电子元件之间的通信而导致的延迟降低了通信延迟。 当将数据从第一分量传送到第二分量时，使用第一时钟将数据写入缓冲器，然后使用第二时钟由第二分量提取。 或者，当从第二组件传送数据到第一组件时，第一组件从第二组件读取数据并监视在第二时钟信号的相关边缘期间是否提取数据，在这种情况下，第一组件再次提取 来自第二个组件的数据。

公开(公告)号：US08856559B2

公开(公告)日：2014-10-07

申请号：US13437675

申请日：2012-04-02

申请人： Veronica Alarcon ,  Love Kothari ,  Amar Guettaf ,  Kerry Thompson

发明人： Veronica Alarcon ,  Love Kothari ,  Amar Guettaf ,  Kerry Thompson

IPC分类号： G06F1/00 ,  H03K5/13 ,  G06F1/32 ,  H03K19/01 ,  H03K3/037 ,  H03K3/03 ,  H03K5/00

CPC分类号： H03L7/0802 ,  G06F1/26 ,  G06F1/32 ,  G06F1/3203 ,  G06F1/3228 ,  G06F12/14 ,  G06F21/44 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K3/037 ,  H03K3/0375 ,  H03K5/133 ,  H03K19/01 ,  H03K2005/00019 ,  H03K2005/00026 ,  H03K2005/00058 ,  H03L7/097 ,  H03L7/0997 ,  H01L2924/00

摘要： An integrated circuit is disclosed that contains both a PMU and another processing portion, such as a baseband. Because of the limited pins devoted to the PMU, the PMU receives most of its signals through the other processing portion of the integrated circuit. Thus, in order to protect the PMU, the integrated circuit isolates the PMU portion from receiving different signals from the other processing portion until after certain conditions are satisfied. In addition, the integrated circuit includes a GPIO pin bank in the other processing portion that can be freely configured so as to allow for testing of the PMU.

摘要翻译： 公开了一种集成电路，其包含PMU和诸如基带的另一处理部分。 由于PMU有限的引脚，PMU通过集成电路的其他处理部分接收大部分信号。 因此，为了保护PMU，集成电路将PMU部分与其他处理部分接收不同的信号，直到满足某些条件为止。 此外，该集成电路包括另一个处理部分中的GPIO引脚组，该GPIO引脚组可以被自由地配置为允许对PMU进行测试。