Semiconductor device card methods of intializing checking the authenticity and the indentity thereof
    1.
    发明申请
    Semiconductor device card methods of intializing checking the authenticity and the indentity thereof 有权
    半导体器件卡的方法,初步检查其真实性和不确定性

    公开(公告)号:US20050021993A1

    公开(公告)日:2005-01-27

    申请号:US10497264

    申请日:2002-11-28

    摘要: The semiconductor device (11) of the invention comprises a circuit that is covered by a passivation structure. It is provided with a first security element (12) that comprises a local area of the passivation structure and which has a first impedance. Preferably, a plurality of security elements (12) is present, whose the impedances differ. The semiconductor device (11) further comprises measuring means (4) for measuring an actual value of the first impedance, and a memory (7) comprising a first memory element (7A) for storing the actual value as a first reference value in the first memory element (7A). The semiconductor device (11) of the invention can be initialized by a method wherein the actual value is stored as the first reference value. Its authenticity can be checked by comparison of the actual value again measured and the first reference value.

    摘要翻译: 本发明的半导体器件(11)包括被钝化结构覆盖的电路。 它设置有包括钝化结构的局部区域并且具有第一阻抗的第一安全元件(12)。 优选地,存在多个安全元件(12),其阻抗不同。 半导体器件(11)还包括用于测量第一阻抗的实际值的测量装置(4),以及包括第一存储元件(7A)的存储器(7),用于将实际值作为第一参考值存储在第一 存储元件(7A)。 本发明的半导体器件(11)可以通过将实际值存储为第一基准值的方法来初始化。 可以通过比较再次测量的实际值和第一个参考值来检查其真实性。

    Semiconductor device, card, system, and methods of initializing and checking the authenticity and the identify of the semiconductor device
    2.
    发明申请
    Semiconductor device, card, system, and methods of initializing and checking the authenticity and the identify of the semiconductor device 有权
    半导体器件,卡,系统以及初始化和检查半导体器件的真实性和识别的方法

    公开(公告)号:US20050051351A1

    公开(公告)日:2005-03-10

    申请号:US10497257

    申请日:2002-11-28

    摘要: The semiconductor device (11) of the invention comprises a circuit covered by a passivation structure (50). It is provided with a first and a second security element (12A, 12B) which comprise local areas of the passivation structure (50), and with a first and a second electrode (14,15). The security elements (12A, 12B) have a first and a second impedance, respectively, which impedances differ. This is realized in that the passivation structure has an effective dielectric constant that varies laterally over the circuit. Actual values of the impedances are measured by measuring means and transferred to an access device by transferring means. The access device comprises or has access to a central database device for storing the impedances. The access device furthermore may compare the actual values with the stored values of the impedances in order to check the authenticity or the identity of the semiconductor device.

    摘要翻译: 本发明的半导体器件(11)包括由钝化结构(50)覆盖的电路。 它设置有包括钝化结构(50)的局部区域以及第一和第二电极(14,15)的第一和第二安全元件(12A,12B)。 安全元件(12A,12B)分别具有阻抗不同的第一和第二阻抗。 这实现于钝化结构具有在电路上横向变化的有效介电常数。 通过测量装置测量阻抗的实际值,并通过传送装置传送到接入装置。 访问设备包括或者可以访问用于存储阻抗的中央数据库设备。 接入装置还可以将实际值与阻抗的存储值进行比较,以便检查半导体器件的真实性或身份。

    Semiconductor device, method of authentifying and system
    3.
    发明申请
    Semiconductor device, method of authentifying and system 有权
    半导体器件,认证方法和系统

    公开(公告)号:US20070040256A1

    公开(公告)日:2007-02-22

    申请号:US10557262

    申请日:2004-05-17

    IPC分类号: H01L23/02

    摘要: The semiconductor device (11) of the invention comprises a circuit and a protecting structure (50). It is provided with a first and a second security element (12A, 12B) and with an input and an output (14,15). The security elements (12A, 12B) have a first and a second impedance, respectively, which impedances differ. The device is further provided with measuring means, processing means and connection means. The processing means transform any first information received into a specific program of measurement. Herewith a challenge-response mechanism is implemented in the device (11).

    摘要翻译: 本发明的半导体器件(11)包括电路和保护结构(50)。 它设置有第一和第二安全元件(12A,12B)以及输入和输出(14,15)。 安全元件(12A,12B)分别具有阻抗不同的第一和第二阻抗。 该装置还设有测量装置,处理装置和连接装置。 处理装置将接收到的任何第一信息转换成特定的测量程序。 因此,在设备(11)中实现了挑战响应机制。

    Method of manufacturing a semiconductor device with mos transistors comprising gate electrodes formed in a packet of metal layers deposited upon one another
    4.
    发明申请
    Method of manufacturing a semiconductor device with mos transistors comprising gate electrodes formed in a packet of metal layers deposited upon one another 有权
    制造具有MOS晶体管的半导体器件的方法,包括形成在彼此沉积的金属层的分组中的栅电极

    公开(公告)号:US20060134848A1

    公开(公告)日:2006-06-22

    申请号:US10544413

    申请日:2004-01-15

    IPC分类号: H01L21/8238 H01L21/44

    摘要: Method of manufacturing a semiconductor device comprising MOS transistors having gate electrodes (15, 16) formed in a number of metal layers (8, 9, 13; 8, 12, 13) deposited upon one another. In this method, active silicon regions (4, 5) provided with a layer of a gate dielectric (7) and field-isolation regions (6) insulating these regions with respect to each other are formed in a silicon body (1). Then, a layer off a first metal (8) is deposited in which locally, at the location of a part of the active regions (4), nitrogen is introduced. On the layer of the first metal, a layer of a second metal (13) is then deposited, after which the gate electrodes are etched in the metal layers. Before nitrogen is introduced into the first metal layer, an auxiliary layer of a third metal (9) which is permeable to nitrogen is deposited on the first metal layer. Thus, the first metal layer can be nitrided locally without the risk of damaging the underlying gate dielectric. Substantial changes of the metal work function are possible, and a semiconductor device comprising NMOS and PMOS can be realized.

    摘要翻译: 一种制造半导体器件的方法,包括:MOS晶体管,其具有形成在彼此沉积的多个金属层(8,9,13; 8,12,13)中的栅电极(15,16)。 在这种方法中,在硅体(1)中形成具有栅极电介质层(7)的层和在这些区域彼此绝缘的场隔离区域(6)的有源硅区域(4,5)。 然后,沉积第一金属(8)上的层,其中局部地在一部分有源区(4)的位置处引入氮。 在第一金属层上沉积第二金属层(13),然后在金属层中蚀刻栅电极。 在将氮气引入第一金属层之前,在第一金属层上沉积有氮渗透的第三金属(9)的辅助层。 因此,第一金属层可以局部氮化,而不会损坏下面的栅极电介质。 可以实现金属功函数的显着变化,并且可以实现包括NMOS和PMOS的半导体器件。

    Semiconductor device and method of manufacturing such a semiconductor device
    6.
    发明授权
    Semiconductor device and method of manufacturing such a semiconductor device 有权
    半导体装置及其制造方法

    公开(公告)号:US07763944B2

    公开(公告)日:2010-07-27

    申请号:US11574245

    申请日:2005-08-10

    IPC分类号: H01L27/092

    CPC分类号: H01L21/823842

    摘要: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.

    摘要翻译: 本发明涉及具有NMOST I和PMOST 2的CMOS器件(10),栅极区(1D,2D)包括含有金属和另一元素的化合物。 根据本发明,第一和第二导电材料都包含含有选自钼和钨的金属作为金属的化合物,并且都包含选自碳,氧和硫族化物的元素作为另外的元素。 优选地,第一和第二导电材料都包含钼和碳或氧的化合物。 本发明还提供了制造这种装置的有吸引力的方法。

    Semiconduct Device and Method of Manufacturing Such a Semiconductor Device
    7.
    发明申请
    Semiconduct Device and Method of Manufacturing Such a Semiconductor Device 有权
    半导体器件及其制造方法

    公开(公告)号:US20080211032A1

    公开(公告)日:2008-09-04

    申请号:US11574245

    申请日:2005-08-10

    IPC分类号: H01L27/092 H01L21/8238

    CPC分类号: H01L21/823842

    摘要: The invention relates to a CMOS device (10) with an NMOST I and PMOST 2 having gate regions (1D,2D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.

    摘要翻译: 本发明涉及具有NMOST I和PMOST 2的CMOS器件(10),其具有栅极区域(1D,2D),其包含含有金属和另一元素的化合物。 根据本发明,第一和第二导电材料都包含含有选自钼和钨的金属作为金属的化合物,并且都包含选自碳,氧和硫族化物的元素作为另外的元素。 优选地,第一和第二导电材料都包含钼和碳或氧的化合物。 本发明还提供了制造这种装置的有吸引力的方法。

    Electric device with phase change material and parallel heater
    8.
    发明申请
    Electric device with phase change material and parallel heater 有权
    具有相变材料和并联加热器的电气设备

    公开(公告)号:US20060208847A1

    公开(公告)日:2006-09-21

    申请号:US10539102

    申请日:2003-12-05

    IPC分类号: H01C7/06

    摘要: The electric device (1, 100) has a body (2, 102) having a resistor (7, 107) comprising a phase change material being changeable between a first phase and a second phase. The resistor (7, 107) has a first electrical resistance when the phase change material is in the first phase and a second electrical resistance, different from the first electrical resistance, when the phase change material is in the second phase. The body (2, 102) further has a heating element (6, 106) being able to conduct a current for enabling a transition from the first phase to the second phase. The heating element (6, 106) is arranged in parallel with the resistor (7, 107).

    摘要翻译: 电气设备(1,100)具有主体(2,102),该主体具有电阻器(7,107),该电阻器包括可在第一相位和第二相位之间变化的相变材料。 当相变材料处于第二相时,当相变材料处于第一相位时,电阻器(7,107)具有第一电阻,并且具有与第一电阻不同的第二电阻。 主体(2,102)还具有加热元件(6,106),该加热元件能够传导电流以实现从第一相到第二相的转变。 加热元件(6,106)与电阻器(7,107)平行设置。

    Electric Device With Vertical Component
    9.
    发明申请
    Electric Device With Vertical Component 审中-公开
    带垂直部件的电器

    公开(公告)号:US20070222074A1

    公开(公告)日:2007-09-27

    申请号:US11569175

    申请日:2005-05-19

    IPC分类号: H01L23/52 H01L21/3205

    摘要: A method of providing an electric device with a vertical component and the device itself are disclosed. The electric device may be a transistor device, such as a FET device, with a vertical channel, such as a gate around transistor, or double-gate transistor First an elongate structure, such as a nanowire is provided to a substrate. Subsequently, a first conductive layer separated from the substrate and from the elongate structure by a dielectric layer is provided. Further, a second conductive layer being separated from the first conductive layer by a separation layer is being provided in contact with at least a top section of the elongate structure.

    摘要翻译: 公开了一种提供具有垂直分量的电子装置和装置本身的方法。 电子器件可以是诸如FET器件的晶体管器件,具有垂直沟道,例如围绕晶体管的栅极或双栅极晶体管。首先,诸如纳米线的细长结构被提供到衬底。 随后,提供了通过介电层从基板和细长结构分离的第一导电层。 此外,通过分离层与第一导电层分离的第二导电层被提供为与细长结构的至少顶部部分接触。

    Electric device comprising phase change material
    10.
    发明申请
    Electric device comprising phase change material 有权
    包含相变材料的电气装置

    公开(公告)号:US20060049389A1

    公开(公告)日:2006-03-09

    申请号:US10539251

    申请日:2003-12-03

    IPC分类号: H01L29/02

    摘要: The electric device (1, 100) has a body (2, 101) with a resistor (7, 250) comprising a phase change material being changeable between a first phase and a second phase. The resistor (7, 250) has an electric resistance which depends on whether the phase change material is in the first phase or the second phase. The resistor (7, 250) is able to conduct a current for enabling a transition from the first phase to the second phase. The phase change material is a fast growth material which may be a composition of formula Sb1-cMc with c satisfying 0.05≦c≦0.61, and M being one or more elements selected from the group of Ge, In, Ag, Ga, Te, Zn and Sn, or a composition of formula SbaTebX100-(a+b) with a, b and 100-(a+b) denoting atomic percentages satisfying 1≦a/b≦8 and 4≦100-(a+b)≦22, and X being one or more elements selected from Ge, In, Ag, Ga and Zn.

    摘要翻译: 电气设备(1,100)具有带有电阻器(7,250)的主体(2,101),该电阻器包括可在第一相位和第二相位之间变化的相变材料。 电阻器(7,250)具有取决于相变材料是处于第一相还是第二相的电阻。 电阻器(7,250)能够传导用于实现从第一相到第二相的转变的电流。 相变材料是快速生长材料,其可以是具有式(Ⅳ)的组成,其中c满足0.05≤c≤0.61,M为 选自Ge,In,Ag,Ga,Te,Zn和Sn中的一种或多种元素,或式Sb的组合物,其中R a, 100-(a + b),其中a,b和100-(a + b)表示满足1 <= a / b <= 8且4 <= 100-(a + b)<= 22 ,X是选自Ge,In,Ag,Ga和Zn中的一种或多种元素。