Method of using carbon spacers for critical dimension (CD) reduction
    3.
    发明授权
    Method of using carbon spacers for critical dimension (CD) reduction 失效
    使用碳间隔物进行临界尺寸(CD)还原的方法

    公开(公告)号:US07169711B1

    公开(公告)日:2007-01-30

    申请号:US10170984

    申请日:2002-06-13

    IPC分类号: H01L21/302

    CPC分类号: H01L21/3086 H01L21/0337

    摘要: A method of using carbon spacers for critical dimension reduction can include providing a patterned photoresist layer above a substrate where the patterned photoresist layer has an aperture with a first width, depositing a carbon film over the photoresist layer and etching the deposited carbon film to form spacers on lateral side walls of the aperture of the patterned photoresist layer, etching the substrate using the formed spacers and patterned photoresist layer as a pattern to form a trench having a second width, and removing the patterned photoresist layer and formed spacers using an oxidizing etch.

    摘要翻译: 使用碳间隔物进行临界尺寸减小的方法可以包括在基底上提供图案化的光致抗蚀剂层,其中图案化的光致抗蚀剂层具有第一宽度的孔,在光致抗蚀剂层上沉积碳膜并蚀刻沉积的碳膜以形成间隔物 在图案化光致抗蚀剂层的孔的侧壁上,使用所形成的间隔物和图案化的光致抗蚀剂层作为图案蚀刻衬底,以形成具有第二宽度的沟槽,并使用氧化蚀刻去除图案化的光致抗蚀剂层和形成的间隔物。

    Use of diamond as a hard mask material
    4.
    发明授权
    Use of diamond as a hard mask material 有权
    使用金刚石作为硬面罩材料

    公开(公告)号:US06673684B1

    公开(公告)日:2004-01-06

    申请号:US10335726

    申请日:2003-01-02

    IPC分类号: H01L21336

    CPC分类号: H01L21/32139

    摘要: A method for producing an integrated circuit includes providing a diamond layer above a layer of conductive material. A cap layer is provided above the diamond layer and patterned to form a cap feature. The diamond layer is patterned according to the cap feature to form a mask, and at least a portion of the layer of conductive material is removed according to the mask.

    摘要翻译: 一种用于制造集成电路的方法包括在导电材料层之上提供金刚石层。 盖层设置在金刚石层之上并图案化以形成盖特征。 根据盖特征对金刚石层进行图案化以形成掩模,并且根据掩模去除导电材料层的至少一部分。

    Use of amorphous carbon for gate patterning
    6.
    发明授权
    Use of amorphous carbon for gate patterning 失效
    无定形碳用于栅极图案化

    公开(公告)号:US07015124B1

    公开(公告)日:2006-03-21

    申请号:US10424420

    申请日:2003-04-28

    IPC分类号: H01L21/3205 H01L21/4763

    摘要: A method of producing an integrated circuit includes providing a mask definition structure above a layer of conductive material and providing a mask above the layer of conductive material and in contact with at least a portion of the mask definition structure. The mask definition structure comprises a first material and the mask comprises a second material, wherein at least one of the first and second materials comprises amorphous carbon. The mask definition structure is removed, and the layer of conductive material is patterned according to the mask.

    摘要翻译: 一种制造集成电路的方法包括在导电材料层之上提供掩模定义结构,并在导电材料层之上提供掩模,并与掩模定义结构的至少一部分接触。 掩模定义结构包括第一材料,掩模包括第二材料,其中第一和第二材料中的至少一个包括无定形碳。 去除掩模定义结构,并根据掩模对导电材料层进行图案化。

    Method of forming sub-lithographic spaces between polysilicon lines
    9.
    发明授权
    Method of forming sub-lithographic spaces between polysilicon lines 失效
    在多晶硅线之间形成次光刻空间的方法

    公开(公告)号:US06500756B1

    公开(公告)日:2002-12-31

    申请号:US10184251

    申请日:2002-06-28

    IPC分类号: H01L214763

    摘要: A method of forming spaces between polysilicon lines can include patterning structures having top SiON layers and bottom amorphous carbon layers where the structures are located over a polysilicon layer and are separated by a first width, forming amorphous carbon spacers along lateral side walls of the patterned structures, etching apertures into the polysilicon layer not covered by the amorphous carbon spacers and the patterned structures where the apertures in the polysilicon layer between adjacent patterned structures have a second width, and ashing away the amorphous carbon spacers and the patterned structures. The second width is less than the first width.

    摘要翻译: 在多晶硅线之间形成空间的方法可以包括具有顶部SiON层和底部无定形碳层的图形结构,其中结构位于多晶硅层上方并且被第一宽度分开,从而沿图案化结构的侧壁形成非晶碳间隔物 蚀刻入未被无定形碳间隔物和图案化结构覆盖的多晶硅层中的孔,其中相邻图案化结构之间的多晶硅层中的孔具有第二宽度,并且将非晶碳间隔物和图案化结构灰化。 第二宽度小于第一宽度。