公开(公告)号：US08048784B2

公开(公告)日：2011-11-01

申请号：US12284565

申请日：2008-09-23

申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

IPC分类号： H01L21/36

CPC分类号： H01L21/02532 ,  H01L21/02636 ,  H01L21/02675

摘要： Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer containing amorphous silicon material is formed on the seed layer. The amorphous silicon layer is doped with an impurity. A laser beam is irradiated onto the amorphous silicon layer to produce a phase change of the amorphous silicon layer and change the amorphous silicon layer into a single-crystal silicon layer based on the seed layer.

摘要翻译： 制造半导体器件的方法包括在衬底上形成含有硅材料的晶种层。 在种子层上形成含有非晶硅材料的非晶硅层。 非晶硅层掺杂有杂质。 将激光束照射到非晶硅层上以产生非晶硅层的相变，并且基于种子层将非晶硅层改变为单晶硅层。

公开(公告)号：US07470603B2

公开(公告)日：2008-12-30

申请号：US11701694

申请日：2007-02-02

申请人： Yong-Won Cha ,  Sung-Kwan Kang ,  Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

发明人： Yong-Won Cha ,  Sung-Kwan Kang ,  Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

IPC分类号： H01L21/00

CPC分类号： H01L21/31144 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02686 ,  H01L29/66651

摘要： Methods of fabricating a semiconductor device are provided. A semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A thin layer is formed on the semiconductor substrate. The thin layer is patterned to form a plurality of spaced apart field structures and to expose therebetween portions of the semiconductor substrate having the single crystalline structure. A non-crystalline layer is formed on the exposed portions of the semiconductor substrate having the single crystalline structure. The non-crystalline layer is planarized to expose upper surfaces of the field structures and define non-crystalline active structures from the non-crystalline layer between the field structures. A laser beam is generated that heats the non-crystalline active structures to change them into single crystalline active structures having substantially the same single crystalline structure as the defined region of the semiconductor substrate.

公开(公告)号：US07816735B2

公开(公告)日：2010-10-19

申请号：US11974293

申请日：2007-10-12

申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

IPC分类号： H01L33/16

CPC分类号： H01L21/823425 ,  H01L21/823475

摘要： Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.

摘要翻译： 在第一单晶层上提供包括第一单晶层和绝缘层图案的集成电路器件。 绝缘层图案在其中具有部分地暴露第一单晶层的开口。 种子层在开口处。 第二单晶层位于绝缘层图案和籽晶层上。 第二单晶层具有与种子层基本相同的晶体结构。 转录阻止图案位于转录阻止图案和第二单晶层上的第二单晶层和第三单晶层上。 转录阻止图案被配置为将第二单晶层中的缺陷部分的转录限制为第三单晶层。

公开(公告)号：US07700461B2

公开(公告)日：2010-04-20

申请号：US12061253

申请日：2008-04-02

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

IPC分类号： H01L21/20

CPC分类号： H01L21/8221 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/0688 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1285 ,  H01L29/78675

摘要： In a method of manufacturing a semiconductor device, a string structure including a selection transistor and a memory cell on a substrate. An insulation layer pattern is formed on the substrate to cover the string structure. The insulation layer pattern includes at least one opening exposing a portion of the substrate adjacent to the selection transistor. A seed layer including a single-crystalline material is formed in the opening. An amorphous thin film including an amorphous material is formed on the insulation layer pattern and the seed layer. The amorphous thin film is transformed into a single-crystalline thin film, using the single-crystalline material in the seed layer as a seed during a phase transition of the amorphous thin film, to form a channel layer on the insulation layer pattern and the seed layer. Therefore, the semiconductor device including the channel layer having the single-crystalline thin film may be manufactured.

摘要翻译： 在制造半导体器件的方法中，包括在衬底上的选择晶体管和存储单元的串联结构。 在衬底上形成绝缘层图案以覆盖串结构。 绝缘层图案包括暴露基板的与选择晶体管相邻的部分的至少一个开口。 在开口中形成包括单晶材料的晶种层。 在绝缘层图案和种子层上形成包含非晶材料的非晶态薄膜。 在非晶薄膜的相变期间，将晶种层中的单晶材料作为种子，将非晶薄膜转变为单晶薄膜，以在绝缘层图案和种子上形成沟道层 层。 因此，可以制造包括具有单晶薄膜的沟道层的半导体器件。

公开(公告)号：US20080194083A1

公开(公告)日：2008-08-14

申请号：US12061253

申请日：2008-04-02

申请人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

发明人： Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Pil-Kyu Kang

IPC分类号： H01L21/36

CPC分类号： H01L21/8221 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/0688 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/1285 ,  H01L29/78675

摘要： In a method of manufacturing a semiconductor device, a string structure including a selection transistor and a memory cell on a substrate. An insulation layer pattern is formed on the substrate to cover the string structure. The insulation layer pattern includes at least one opening exposing a portion of the substrate adjacent to the selection transistor. A seed layer including a single-crystalline material is formed in the opening. An amorphous thin film including an amorphous material is formed on the insulation layer pattern and the seed layer. The amorphous thin film is transformed into a single-crystalline thin film, using the single-crystalline material in the seed layer as a seed during a phase transition of the amorphous thin film, to form a channel layer on the insulation layer pattern and the seed layer. Therefore, the semiconductor device including the channel layer having the single-crystalline thin film may be manufactured.

摘要翻译： 在制造半导体器件的方法中，包括在衬底上的选择晶体管和存储单元的串联结构。 在衬底上形成绝缘层图案以覆盖串结构。 绝缘层图案包括暴露基板的与选择晶体管相邻的部分的至少一个开口。 在开口中形成包括单晶材料的晶种层。 在绝缘层图案和种子层上形成包含非晶材料的非晶态薄膜。 在非晶薄膜的相变期间，将晶种层中的单晶材料作为种子，将非晶薄膜转变为单晶薄膜，以在绝缘层图案和种子上形成沟道层 层。 因此，可以制造包括具有单晶薄膜的沟道层的半导体器件。

公开(公告)号：US20080093601A1

公开(公告)日：2008-04-24

申请号：US11974293

申请日：2007-10-12

申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  In-Soo Jung

发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  In-Soo Jung

IPC分类号： H01L29/786 ,  H01L29/12 ,  H01L21/84

CPC分类号： H01L21/823425 ,  H01L21/823475

摘要： Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.

摘要翻译： 在第一单晶层上提供包括第一单晶层和绝缘层图案的集成电路器件。 绝缘层图案在其中具有部分地暴露第一单晶层的开口。 种子层在开口处。 第二单晶层位于绝缘层图案和籽晶层上。 第二单晶层具有与种子层基本相同的晶体结构。 转录阻止图案位于转录阻止图案和第二单晶层上的第二单晶层和第三单晶层上。 转录阻止图案被配置为将第二单晶层中的缺陷部分的转录限制为第三单晶层。

公开(公告)号：US20080014726A1

公开(公告)日：2008-01-17

申请号：US11701694

申请日：2007-02-02

申请人： Yong-Won Cha ,  Sung-Kwan Kang ,  Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

发明人： Yong-Won Cha ,  Sung-Kwan Kang ,  Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

IPC分类号： H01L21/00

CPC分类号： H01L21/31144 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02686 ,  H01L29/66651

摘要： Methods of fabricating a semiconductor device are provided. A semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A thin layer is formed on the semiconductor substrate. The thin layer is patterned to form a plurality of spaced apart field structures and to expose therebetween portions of the semiconductor substrate having the single crystalline structure. A non-crystalline layer is formed on the exposed portions of the semiconductor substrate having the single crystalline structure. The non-crystalline layer is planarized to expose upper surfaces of the field structures and define non-crystalline active structures from the non-crystalline layer between the field structures. A laser beam is generated that heats the non-crystalline active structures to change them into single crystalline active structures having substantially the same single crystalline structure as the defined region of the semiconductor substrate.

摘要翻译： 提供制造半导体器件的方法。 提供半导体衬底，其在至少其限定区域内包括单晶结构。 在半导体衬底上形成薄层。 图案化薄层以形成多个间隔开的场结构，并在其间具有单晶结构的半导体衬底的部分露出。 在具有单晶结构的半导体衬底的露出部分上形成非晶层。 非晶层被平坦化以暴露场结构的上表面并且从场结构之间的非晶层限定非结晶活性结构。 产生激光束，其加热非结晶活性结构以将其改变成具有与半导体衬底的限定区域基本上相同的单晶结构的单晶有源结构。

公开(公告)号：US20100330753A1

公开(公告)日：2010-12-30

申请号：US12879401

申请日：2010-09-10

申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Si-Young Choi ,  Jong-Wook Lee ,  Byeong-Chan Lee ,  InSoo Jung

IPC分类号： H01L21/336 ,  C30B1/02

CPC分类号： H01L21/823425 ,  H01L21/823475

摘要： Integrated circuit devices are provided including a first single-crystalline layer and an insulating layer pattern on the first single-crystalline layer. The insulating layer pattern has an opening therein that partially exposes the first single-crystalline layer. A seed layer is in the opening. A second single-crystalline layer is on the insulating layer pattern and the seed layer. The second single-crystalline layer has a crystalline structure substantially the same as that of the seed layer. A transcription-preventing pattern is on the second single-crystalline layer and a third single-crystalline layer on the transcription-preventing pattern and the second single-crystalline layer. The transcription-preventing pattern is configured to limit transcription of defective portions in the second single-crystalline layer into the third single-crystalline layer.

摘要翻译： 在第一单晶层上提供包括第一单晶层和绝缘层图案的集成电路器件。 绝缘层图案在其中具有部分地暴露第一单晶层的开口。 种子层在开口处。 第二单晶层位于绝缘层图案和籽晶层上。 第二单晶层具有与种子层基本相同的晶体结构。 转录阻止图案位于转录阻止图案和第二单晶层上的第二单晶层和第三单晶层上。 转录阻止图案被配置为将第二单晶层中的缺陷部分的转录限制为第三单晶层。

公开(公告)号：US20090104759A1

公开(公告)日：2009-04-23

申请号：US12284565

申请日：2008-09-23

申请人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

发明人： Pil-Kyu Kang ,  Yong-Hoon Son ,  Jong-Wook Lee

IPC分类号： H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/02636 ,  H01L21/02675

摘要： Methods for manufacturing a semiconductor device include forming a seed layer containing a silicon material on a substrate. An amorphous silicon layer containing amorphous silicon material is formed on the seed layer. The amorphous silicon layer is doped with an impurity. A laser beam is irradiated onto the amorphous silicon layer to produce a phase change of the amorphous silicon layer and change the amorphous silicon layer into a single-crystal silicon layer based on the seed layer.

摘要翻译： 制造半导体器件的方法包括在衬底上形成含有硅材料的晶种层。 在种子层上形成含有非晶硅材料的非晶硅层。 非晶硅层掺杂有杂质。 将激光束照射到非晶硅层上以产生非晶硅层的相变，并且基于种子层将非晶硅层改变为单晶硅层。

公开(公告)号：US08319329B2

公开(公告)日：2012-11-27

申请号：US13359047

申请日：2012-01-26

申请人： Pil-kyu Kang ,  Jung-Ho Kim ,  Jong-Wook Lee ,  Seung-woo Choi ,  Dae-Lok Bae

发明人： Pil-kyu Kang ,  Jung-Ho Kim ,  Jong-Wook Lee ,  Seung-woo Choi ,  Dae-Lok Bae

IPC分类号： H01L23/02 ,  H01L29/40 ,  H01L23/053 ,  H01L23/12 ,  H01L23/34 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L24/25 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68377 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/13009 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73257 ,  H01L2224/83894 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Microelectronic packages are fabricated by stacking integrated circuits upon one another. Each integrated circuit includes a semiconductor layer having microelectronic devices and a wiring layer on the semiconductor layer having wiring that selectively interconnects the microelectronic devices. After stacking, a via is formed that extends through at least two of the integrated circuits that are stacked upon one another. Then, the via is filled with conductive material that selectively electrically contacts the wiring. Related microelectronic packages are also described.

摘要翻译： 微电子封装通过彼此堆叠集成电路制造。 每个集成电路包括具有微电子器件的半导体层和在半导体层上具有有选择性地互连微电子器件的布线的布线层。 在堆叠之后，形成延伸通过彼此堆叠的至少两个集成电路的通孔。 然后，通孔被选择性地电接触布线的导电材料填充。 还描述了相关微电子封装。