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    ELECTRONIC DEVICE
    1.
    发明申请
    ELECTRONIC DEVICE 有权
    电子设备

    公开(公告)号：US20170032834A1

    公开(公告)日：2017-02-02

    申请号：US15170535

    申请日：2016-06-01

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Motoo SUWA ,  Takafumi BETSUI ,  Masato SUZUKI

    IPC: G11C11/408 ,  H01L25/065 ,  G11C5/06 ,  H01L23/528 ,  G11C5/02 ,  H01L23/498 ,  H01L23/522

    CPC classification number: G11C5/063 ,  G11C5/025 ,  G11C11/4082 ,  G11C11/4093 ,  G11C2207/105 ,  H01L23/5228 ,  H01L23/5283 ,  H01L23/5386 ,  H01L23/647 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2924/15192 ,  H01L2924/15311

    Abstract: The number of terminals included in a semiconductor device which is included in an electronic device is reduced. The electronic device includes: a first semiconductor device having first and second input terminals; a second semiconductor device having a first output terminal and a first driver circuit to drive the first output terminal; and a wiring substrate over which the first and second semiconductor devices are mounted. The first and second input terminals are commonly coupled to the first output terminal via a first line formed on the wiring substrate. A composite resistance value of first and second termination resistors coupled to the first and second input terminals, respectively, is equivalent to a drive impedance of the first driver circuit.

    Abstract translation: 包括在包括在电子设备中的半导体器件中的终端的数量减少。 电子设备包括：具有第一和第二输入端的第一半导体器件; 具有第一输出端和驱动所述第一输出端的第一驱动电路的第二半导体器件; 以及安装有第一和第二半导体器件的布线基板。 第一和第二输入端通常经由形成在布线基板上的第一线耦合到第一输出端。 分别耦合到第一和第二输入端的第一和第二终端电阻的复合电阻值等于第一驱动电路的驱动阻抗。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20160173108A1

    公开(公告)日：2016-06-16

    申请号：US14967006

    申请日：2015-12-11

    Applicant: Renesas Electronics Corporation

    Inventor： Takeshi OSHITA ,  Takanori HIROTA ,  Masato SUZUKI

    IPC: H03L7/081 ,  G11C11/4076 ,  G11C11/4093 ,  H03K3/037

    CPC classification number: G11C11/4093 ,  G11C7/1066 ,  G11C7/1093 ,  G11C7/222 ,  G11C11/4076 ,  H03L7/0814

    Abstract: A delay time is set only within the variable delay time of a clock driver and cannot be set longer than the variable delay time of the clock driver. A control circuit adjusts the delay amount of a variable delay circuit so as to synchronize a pulse phase after a first pulse outputted from a pulse generation circuit passes through the variable delay circuit N times and a second pulse outputted from the pulse generation circuit.

    Abstract translation: 延迟时间仅在时钟驱动器的可变延迟时间内设置，并且不能设置为长于时钟驱动器的可变延迟时间。 控制电路调整可变延迟电路的延迟量，以便在从脉冲发生电路输出的第一脉冲通过可变延迟电路N次之后使脉冲相位同步，并从脉冲发生电路输出的第二脉冲。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20140368239A1

    公开(公告)日：2014-12-18

    申请号：US14470550

    申请日：2014-08-27

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Shigeyuki SUZUKI ,  Masato SUZUKI

    IPC: H03K5/01 ,  H03K19/0185

    CPC classification number: H03K5/01 ,  H03K19/018507 ,  H03K19/018528

    Abstract: Provided is a semiconductor device with an output circuit in which a variation of a common voltage is suppressed in an idling mode and in a normal mode. The output circuit provided in the semiconductor device includes a first termination resistor and a second termination resistor and a drive circuit which flows current through the termination resistors. The output circuit is configured so as to be able to adjust the value of current which flows through the first termination resistor and the second termination resistor or the value of resistance of the first termination resistor and the second termination resistor.

    Abstract translation: 提供一种具有输出电路的半导体器件，其中在空载模式和正常模式下公共电压的变化被抑制。 设置在半导体器件中的输出电路包括第一终端电阻器和第二终端电阻器以及流过终端电阻器的电流的驱动电路。 输出电路被配置为能够调节流过第一终端电阻器和第二终端电阻器的电流值或第一终端电阻器和第二终端电阻器的电阻值。

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