公开(公告)号：US20240332081A1

公开(公告)日：2024-10-03

申请号：US18621719

申请日：2024-03-29

Applicant: ROHM CO., LTD.

Inventor： Makoto TAKAMURA ,  Takuji MAEKAWA ,  Mitsuru MORIMOTO

IPC: H01L21/78 ,  H01L21/02 ,  H01L21/304 ,  H01L21/3115 ,  H01L21/449 ,  H01L29/04 ,  H01L29/16

CPC classification number: H01L21/7813 ,  H01L21/02115 ,  H01L21/02378 ,  H01L21/02444 ,  H01L21/02529 ,  H01L21/02595 ,  H01L21/304 ,  H01L21/31155 ,  H01L21/449 ,  H01L29/04 ,  H01L29/1608

Abstract: Provided is a method for manufacturing a semiconductor substrate, including: a step of forming a graphene layer on a Si surface of a SiC single crystal substrate; a step of forming a SiC-epitaxial growth layer on the graphene layer; a step of forming a stress layer on the SiC-epitaxial growth layer; a step of attaching a graphite substrate on the stress layer; a step of detaching the graphene layer and the SiC-epitaxial growth layer; a step of forming a SiC polycrystalline growth layer on a C surface of the SiC-epitaxial growth layer from which the graphene layer is detached; and a step of removing the graphite substrate, in which the stress layer generates a stress that facilitates detachment between the graphene layer and the SiC-epitaxial growth layer.

公开(公告)号：US20240321970A1

公开(公告)日：2024-09-26

申请号：US18734613

申请日：2024-06-05

Applicant: ROHM CO., LTD.

Inventor： Takuji MAEKAWA ,  Mitsuru MORIMOTO

IPC: H01L29/16 ,  H01L21/02 ,  H01L29/04 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L29/1608 ,  H01L21/02378 ,  H01L21/02433 ,  H01L21/02516 ,  H01L21/02529 ,  H01L21/02595 ,  H01L29/045 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/872

Abstract: A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.

公开(公告)号：US20220157943A1

公开(公告)日：2022-05-19

申请号：US17588558

申请日：2022-01-31

Applicant: ROHM CO., LTD.

Inventor： Takuji MAEKAWA ,  Mitsuru MORIMOTO

IPC: H01L29/16 ,  H01L29/04 ,  H01L21/02

Abstract: A semiconductor substrate includes a drift layer of a first layer formed of a single crystal SiC semiconductor and a buffer layer and a substrate layer of a second layer that is formed of a SiC semiconductor which includes a polycrystalline structure and is formed on the surface of the first layer, in which the second layer (12) is formed on the surface of the drift layer of the first layer by means of CVD growth, the drift layer of the first layer is formed by means of epitaxial growth, and accordingly, defects occurring at a junction interface of the semiconductor substrate including the single crystal SiC layer and the polycrystal SiC layer are suppressed, and manufacturing costs are also reduced.

公开(公告)号：US20150303330A1

公开(公告)日：2015-10-22

申请号：US14436075

申请日：2013-10-10

Applicant: ROHM CO., LTD. ,  NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY

Inventor： Takuji MAEKAWA ,  Shigeru NIKI ,  Shogo ISHIZUKA ,  Hajime SHIBATA

IPC: H01L31/032 ,  H01L27/146 ,  H01L31/18

CPC classification number: H01L31/0322 ,  H01L27/14643 ,  H01L27/14665 ,  H01L27/14694 ,  H01L31/022466 ,  H01L31/03923 ,  H01L31/10 ,  H01L31/18 ,  Y02E10/541 ,  Y02E10/543 ,  Y02P70/521

Abstract: The inventive photoelectric conversion device includes a substrate, a lower electrode layer provided on the substrate, a CIGS compound semiconductor layer provided on the lower electrode layer as covering the lower electrode layer, and a transparent electrode layer provided on the compound semiconductor layer, wherein the compound semiconductor layer has a maximum Ga content variation of not less than 5% as measured in a layer thickness direction, and a maximum In content variation of not less than 6% as measured in the layer thickness direction.

Abstract translation: 本发明的光电转换装置包括基板，设置在基板上的下电极层，设置在下电极层上的覆盖下电极层的CIGS化合物半导体层和设置在化合物半导体层上的透明电极层，其中， 化合物半导体层的最大Ga含量变化量在层厚度方向上测定为5％以上，最大含量变化量在层厚度方向上测定为6％以上。

公开(公告)号：US20240413208A1

公开(公告)日：2024-12-12

申请号：US18808726

申请日：2024-08-19

Applicant: ROHM CO., LTD.

Inventor： Takuji MAEKAWA ,  Keiju SATO

IPC: H01L29/16 ,  C30B29/36 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L29/872 ,  H01L33/00 ,  H01L33/34

Abstract: A molding is formed by laminating an aggregate of SiC and a paste containing Si and C powders on an epitaxial layer of SiC formed on a support substrate of SiC to form an intermediate sintered body in which polycrystalline SiC is produced from the Si and C powders by reaction sintering, free Si is carbonized to SiC to form a sintered body layer, and the support substrate is removed from the epitaxial layer to form a semiconductor substrate in which the epitaxial layer and the sintered body layer are laminated.

公开(公告)号：US20230369400A1

公开(公告)日：2023-11-16

申请号：US18356223

申请日：2023-07-21

Applicant: ROHM CO., LTD.

Inventor： Makoto TAKAMURA ,  Takuji MAEKAWA ,  Mitsuru MORIMOTO ,  Noriyuki MASAGO ,  Takayasu OKA

IPC: H01L29/06 ,  H01L29/04 ,  H01L21/02 ,  H01L29/78 ,  H01L29/66 ,  H01L29/872 ,  H01L29/16

CPC classification number: H01L29/0684 ,  H01L29/045 ,  H01L21/02447 ,  H01L29/7813 ,  H01L21/02513 ,  H01L21/02595 ,  H01L21/02378 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/6606 ,  H01L29/872 ,  H01L29/1608 ,  H01L21/02658 ,  H01L21/02529

Abstract: A semiconductor substrate (1) according to an embodiment includes: a hexagonal SiC single crystal layer (13I); an SiC epitaxial growth layer (12E) disposed on an Si plane of an SiC single crystal layer (13I); and an SiC polycrystalline growth layer (18PC) disposed on a C plane opposite to the Si plane of the SiC single crystal layer (13I). The SiC single crystal layer (13I) includes a single crystal SiC thin layer (10HE) obtained by weakening the hydrogen ion implantation layer (10HI), and a phosphorus ion implantation layer (10PI). The phosphorus ion implantation layer (10PI) is disposed between the single crystal SiC thin layer (10HE) and the SiC polycrystalline growth layer (18PC). Consequently, the present disclosure provides a low-cost and high-quality semiconductor substrate and a fabrication method thereof.

公开(公告)号：US20230317450A1

公开(公告)日：2023-10-05

申请号：US18330447

申请日：2023-06-07

Applicant: ROHM CO., LTD.

Inventor： Noriyuki MASAGO ,  Takuji MAEKAWA ,  Mitsuru MORIMOTO ,  Takayasu OKA

IPC: H01L21/02 ,  H01L29/16

CPC classification number: H01L21/02529 ,  H01L29/1608 ,  H01L21/02444 ,  H01L21/02378

Abstract: A semiconductor substrate (1) includes: an SiC single crystal substrate (10SB), a first graphene layer (11GR1) disposed on an Si plane of the SiC single crystal substrate 10SB; an SiC epitaxial growth layer (12RE) formed above the SiC single crystal substrate via the first graphene layer; and a second graphene layer (11GR2) disposed on an Si plane of the SiC epitaxial growth layer. There is also included an SiC polycrystalline substrate (16P) provisionally bonded onto the SiC epitaxial growth layer via the second graphene layer. The SiC single crystal substrate is able to be reused by being separated from the SiC epitaxial growth layer. This semiconductor substrate further includes an SiC polycrystalline growth layer (18PC) CVD grown on the C plane of the SiC epitaxial growth layer; and the SiC epitaxial growth layer is transferred to the SiC polycrystalline growth layer.

公开(公告)号：US20240328032A1

公开(公告)日：2024-10-03

申请号：US18613188

申请日：2024-03-22

Applicant: ROHM CO., LTD.

Inventor： Makoto TAKAMURA ,  Mitsuru MORIMOTO ,  Takuji MAEKAWA

IPC: C30B28/14 ,  C30B29/36 ,  C30B31/22 ,  C30B33/02

CPC classification number: C30B28/14 ,  C30B29/36 ,  C30B31/22 ,  C30B33/02

Abstract: The present disclosure provides a support tool, for a temporary substrate using a support plate. The support tool includes: a first dummy substrate and a second dummy substrate; and a support, supporting the first dummy substrate and the second dummy substrate, and including at least three of the support plates. The support plate is fitted with the first dummy substrate through a first groove of the plurality of grooves, and fitted with the second dummy substrate through a second groove of the plurality of grooves. The support is configured to support the temporary substrate inserted into a third groove of the plurality of grooves of the support plate excluding the first groove and the second groove.

公开(公告)号：US20230374698A1

公开(公告)日：2023-11-23

申请号：US18361951

申请日：2023-07-31

Applicant: ROHM CO., LTD.

Inventor： Makoto TAKAMURA ,  Takuji MAEKAWA ,  Mitsuru MORIMOTO ,  Noriyuki MASAGO ,  Takayasu OKA

IPC: C30B25/12 ,  H01L21/02 ,  C30B25/10 ,  C30B25/20 ,  C30B29/36 ,  C30B25/14 ,  C23C16/32 ,  C23C16/458 ,  C23C16/46 ,  C23C16/455

CPC classification number: C30B25/12 ,  H01L21/02529 ,  H01L21/02378 ,  H01L21/02634 ,  C30B25/10 ,  C30B25/20 ,  C30B29/36 ,  C30B25/14 ,  C23C16/325 ,  C23C16/4587 ,  C23C16/46 ,  C23C16/45502

Abstract: A fabricating apparatus (2) of an sic epitaxial wafer disclosed herein includes: a growth furnace (100A); a gas mixing preliminary chamber (107) disposed outside the growth furnace and configured to mix carrier gas and/or material gas and to regulate a pressure thereof; a wafer boat (210) configured so that a plurality of SiC wafer pairs (200WP), in which two substrates each having an SiC single crystal in contact with each other in a back-to-back manner, are disposed at equal intervals with a gap therebetween; and a heating unit (101) configured to heat the wafer boat disposed in the growth furnace to an epitaxial growth temperature. The carrier gas and/or the material gas are introduced into the growth furnace after preliminarily being mixed and pressure-regulated in the gas mixing preliminary chamber (107) to grow an SiC layer on a surface of each of the plurality of SiC wafer pairs.

公开(公告)号：US20230369412A1

公开(公告)日：2023-11-16

申请号：US18357175

申请日：2023-07-24

Applicant: ROHM CO., LTD.

Inventor： Makoto TAKAMURA ,  Takuji MAEKAWA ,  Mitsuru MORIMOTO ,  Noriyuki MASAGO ,  Takayasu OKA

IPC: H01L29/16 ,  C30B29/36 ,  H01L29/04 ,  H01L21/02

CPC classification number: H01L29/1608 ,  H01L29/1606 ,  C30B29/36 ,  H01L29/04 ,  H01L21/02444 ,  H01L21/02447 ,  H01L21/02499 ,  H01L21/02529 ,  H01L21/02595 ,  H01L21/02694 ,  H01L29/872

Abstract: A semiconductor substrate (1) disclosed herein includes: an SiC single crystal substrate (10SB); a graphene layer (11GR) disposed on an Si plane of the SiC single crystal substrate (10SB); an SiC epitaxial growth layer (12RE) disposed above the SiC single crystal substrate (10SB) via the graphene layer (11GR); and a polycrystalline Si layer (15PS) disposed on an Si plane of the SiC epitaxial growth layer (12RE). The semiconductor substrate may include a graphite substrate or an silicon substrate disposed on a polycrystalline Si layer (15PS). The semiconductor substrate may further include an SiC polycrystalline growth layer (18PC) disposed on a C plane of the SiC epitaxial growth layer (12RE). Consequently, the present disclosure provides a low-cost and high-quality semiconductor substrate and a fabrication method thereof.