公开(公告)号：US20100330808A1

公开(公告)日：2010-12-30

申请号：US12824534

申请日：2010-06-28

申请人： Ralf Richter ,  Frank Seliger ,  Martin Mazur

发明人： Ralf Richter ,  Frank Seliger ,  Martin Mazur

IPC分类号： H01L21/311

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7848

摘要： In a replacement gate approach, the dielectric cap layers of the gate electrode structures are removed in a separate removal process, such as a plasma assisted etch process, in order to provide superior process conditions during the subsequent planarization of the interlayer dielectric material for exposing the sacrificial gate material. Due to the superior process conditions, the selective removal of the sacrificial gate material may be accomplished with enhanced uniformity, thereby also contributing to superior stability of transistor characteristics.

摘要翻译： 在替代栅极方法中，在单独的去除工艺（例如等离子体辅助蚀刻工艺）中去除栅电极结构的电介质盖层，以便在层间电介质材料随后的平坦化期间提供优异的工艺条件， 牺牲栅材料。 由于优异的工艺条件，牺牲栅极材料的选择性去除可以通过增强的均匀性来实现，从而也有助于晶体管特性的优异的稳定性。

公开(公告)号：US08258062B2

公开(公告)日：2012-09-04

申请号：US12824534

申请日：2010-06-28

申请人： Ralf Richter ,  Frank Seliger ,  Martin Mazur

发明人： Ralf Richter ,  Frank Seliger ,  Martin Mazur

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L29/7843 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7848

摘要： In a replacement gate approach, the dielectric cap layers of the gate electrode structures are removed in a separate removal process, such as a plasma assisted etch process, in order to provide superior process conditions during the subsequent planarization of the interlayer dielectric material for exposing the sacrificial gate material. Due to the superior process conditions, the selective removal of the sacrificial gate material may be accomplished with enhanced uniformity, thereby also contributing to superior stability of transistor characteristics.

摘要翻译： 在替代栅极方法中，在单独的去除工艺（例如等离子体辅助蚀刻工艺）中去除栅电极结构的电介质盖层，以便在层间电介质材料随后的平坦化期间提供优异的工艺条件， 牺牲栅材料。 由于优异的工艺条件，牺牲栅极材料的选择性去除可以通过增强的均匀性来实现，从而也有助于晶体管特性的优异的稳定性。

公开(公告)号：US08329526B2

公开(公告)日：2012-12-11

申请号：US12905655

申请日：2010-10-15

申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238

CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

公开(公告)号：US20110129980A1

公开(公告)日：2011-06-02

申请号：US12905655

申请日：2010-10-15

申请人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

发明人： Jens Heinrich ,  Frank Seliger ,  Ralf Richter ,  Markus Lenski

IPC分类号： H01L21/336

CPC分类号： H01L21/823828 ,  H01L21/823807 ,  H01L29/7843

摘要： Dielectric cap layers of sophisticated high-k metal gate electrode structures may be efficiently removed on the basis of a sacrificial fill material, thereby reliably preserving integrity of a protective sidewall spacer structure, which in turn may result in superior uniformity of the threshold voltage of the transistors. The sacrificial fill material may be provided in the form of an organic material that may be reduced in thickness on the basis of a wet developing process, thereby enabling a high degree of process controllability.

摘要翻译： 可以基于牺牲填充材料有效地去除复杂的高k金属栅极电极结构的介电盖层，从而可靠地保持保护性侧壁间隔结构的完整性，这又可以导致优异的阈值电压均匀性 晶体管。 牺牲填充材料可以以有机材料的形式提供，其可以基于湿式显影工艺而减小厚度，从而能够实现高度的工艺可控性。

公开(公告)号：US20110073956A1

公开(公告)日：2011-03-31

申请号：US12886765

申请日：2010-09-21

申请人： Jens Heinrich ,  Ralf Richter ,  Katja Steffen ,  Johannes Groschopf ,  Frank Seliger ,  Andreas Ott ,  Manfred Heinz ,  Andy Wei

发明人： Jens Heinrich ,  Ralf Richter ,  Katja Steffen ,  Johannes Groschopf ,  Frank Seliger ,  Andreas Ott ,  Manfred Heinz ,  Andy Wei

IPC分类号： H01L27/06 ,  H01L21/02 ,  H01L21/336

CPC分类号： H01L27/0629

摘要： In a replacement gate approach, the polysilicon material may be efficiently removed during a wet chemical etch process, while the semiconductor material in the resistive structures may be substantially preserved. For this purpose, a species such as xenon may be incorporated into the semiconductor material of the resistive structure, thereby imparting a significantly increased etch resistivity to the semiconductor material. The xenon may be incorporated at any appropriate manufacturing stage.

摘要翻译： 在替代栅极方法中，可以在湿化学蚀刻工艺期间有效地去除多晶硅材料，同时电阻结构中的半导体材料可以被基本保持。 为此，可以将诸如氙的物质并入电阻结构的半导体材料中，从而赋予半导体材料显着增加的蚀刻电阻率。 氙气可以在任何适当的生产阶段进行。

公开(公告)号：US08338306B2

公开(公告)日：2012-12-25

申请号：US12886765

申请日：2010-09-21

申请人： Jens Heinrich ,  Ralf Richter ,  Katja Steffen ,  Johannes Groschopf ,  Frank Seliger ,  Andreas Ott ,  Manfred Heinz ,  Andy Wei

发明人： Jens Heinrich ,  Ralf Richter ,  Katja Steffen ,  Johannes Groschopf ,  Frank Seliger ,  Andreas Ott ,  Manfred Heinz ,  Andy Wei

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L27/0629

摘要： In a replacement gate approach, the polysilicon material may be efficiently removed during a wet chemical etch process, while the semiconductor material in the resistive structures may be substantially preserved. For this purpose, a species such as xenon may be incorporated into the semiconductor material of the resistive structure, thereby imparting a significantly increased etch resistivity to the semiconductor material. The xenon may be incorporated at any appropriate manufacturing stage.

摘要翻译： 在替代栅极方法中，可以在湿化学蚀刻工艺期间有效地去除多晶硅材料，同时电阻结构中的半导体材料可以被基本保持。 为此，可以将诸如氙的物质并入电阻结构的半导体材料中，从而赋予半导体材料显着增加的蚀刻电阻率。 氙气可以在任何适当的生产阶段进行。

公开(公告)号：US07994059B2

公开(公告)日：2011-08-09

申请号：US11865796

申请日：2007-10-02

申请人： Ralf Richter ,  Martin Gerhardt ,  Martin Mazur ,  Joerg Hohage

发明人： Ralf Richter ,  Martin Gerhardt ,  Martin Mazur ,  Joerg Hohage

IPC分类号： H01L21/331

CPC分类号： H01L29/7833 ,  H01L21/76802 ,  H01L21/76825 ,  H01L21/76832 ,  H01L21/76837 ,  H01L21/823412 ,  H01L21/823807 ,  H01L27/092 ,  H01L29/7843

摘要： By forming an additional stressed dielectric material after patterning dielectric liners of different intrinsic stress, a significant increase of performance in transistors may be obtained while substantially not contributing to patterning non-uniformities during the formation of respective contact openings in highly scaled semiconductor devices. The additional dielectric layer may be provided with any type of intrinsic stress, irrespective of the previously selected patterning sequence.

摘要翻译： 通过在对具有不同的本征应力的介电衬垫进行图案化之后形成附加的应力介电材料，可以获得在晶体管中性能的显着提高，同时在高比例尺度的半导体器件中形成各个接触开口期间基本上不会构图不均匀性。 附加介电层可以被提供任何类型的固有应力，而不管先前选择的图案化序列如何。

公开(公告)号：US20080078738A1

公开(公告)日：2008-04-03

申请号：US11733350

申请日：2007-04-10

申请人： Ralf Richter ,  Joerg Hohage ,  Martin Mazur

发明人： Ralf Richter ,  Joerg Hohage ,  Martin Mazur

IPC分类号： H01B13/00

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/31144 ,  H01L21/76802

摘要： By incorporating a material exhibiting a high adhesion on chamber walls of a process chamber during sputter etching, the defect rate in a patterning sequence on the basis of an ARC layer may be significantly reduced, since the adhesion material may be reliably exposed during a sputter preclean process. The corresponding adhesion layer may be positioned within the ARC layer stack so as to be reliably consumed, at least partially, while nevertheless providing the required optical characteristics. Hence, a low defect rate in combination with a high process efficiency may be achieved.

摘要翻译： 通过在溅射蚀刻期间结合在处理室的室壁上表现出高粘附性的材料，可以显着地减少基于ARC层的图案化顺序中的缺陷率，因为粘合材料可以在溅射预清洗期间可靠地暴露 处理。 相应的粘合层可以定位在ARC层堆叠内，以便至少部分地可靠地消耗，同时仍然提供所需的光学特性。 因此，可以实现低缺陷率与高工艺效率的组合。

公开(公告)号：US07938973B2

公开(公告)日：2011-05-10

申请号：US11733350

申请日：2007-04-10

申请人： Ralf Richter ,  Joerg Hohage ,  Martin Mazur

发明人： Ralf Richter ,  Joerg Hohage ,  Martin Mazur

IPC分类号： H01B13/00

CPC分类号： H01L21/76814 ,  H01L21/02063 ,  H01L21/31144 ,  H01L21/76802

摘要： By incorporating a material exhibiting a high adhesion on chamber walls of a process chamber during sputter etching, the defect rate in a patterning sequence on the basis of an ARC layer may be significantly reduced, since the adhesion material may be reliably exposed during a sputter preclean process. The corresponding adhesion layer may be positioned within the ARC layer stack so as to be reliably consumed, at least partially, while nevertheless providing the required optical characteristics. Hence, a low defect rate in combination with a high process efficiency may be achieved.

摘要翻译： 通过在溅射蚀刻期间结合在处理室的室壁上表现出高粘附性的材料，可以显着地减少基于ARC层的图案化顺序中的缺陷率，因为粘合材料可以在溅射预清洗期间可靠地暴露 处理。 相应的粘合层可以定位在ARC层堆叠内，以便至少部分地可靠地消耗，同时仍然提供所需的光学特性。 因此，可以实现低缺陷率与高工艺效率的组合。

公开(公告)号：US07550396B2

公开(公告)日：2009-06-23

申请号：US11742878

申请日：2007-05-01

申请人： Kai Frohberg ,  Volker Grimm ,  Sven Mueller ,  Matthias Lehr ,  Ralf Richter ,  Jochen Klais ,  Martin Mazur ,  Heike Salz ,  Joerg Hohage ,  Matthias Schaller

发明人： Kai Frohberg ,  Volker Grimm ,  Sven Mueller ,  Matthias Lehr ,  Ralf Richter ,  Jochen Klais ,  Martin Mazur ,  Heike Salz ,  Joerg Hohage ,  Matthias Schaller

IPC分类号： H01L21/461

CPC分类号： H01L21/31144 ,  H01L21/76802 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/823807 ,  H01L29/665 ,  H01L29/7833 ,  H01L29/7843

摘要： By performing a plasma treatment for efficiently sealing the surface of a stressed dielectric layer containing silicon nitride, an enhanced performance during the patterning of contact openings may be achieved, since nitrogen-induced resist poisoning may be significantly reduced during the selective patterning of stressed layers of different types of intrinsic stress.

摘要翻译： 通过进行等离子体处理以有效地密封包含氮化硅的应力介电层的表面，可以实现在接触开口的图案化期间提高的性能，因为在所选择的图形化应力层的选择性图案化期间可以显着降低氮诱导的抗蚀剂中毒 不同类型的内在应力。