摘要:
The invention relates to a method for preparing metallic workpieces for cold forming by contacting the metallic surfaces thereof with an aqueous acid phosphating solution so as to embody at least one phosphate coating and then coating the phosphate-coated surfaces with at least one lubricant in order to embody at least one lubricant layer. According to the inventive method, the phosphating solution essentially contains only calcium, magnesium, or/and manganese as cations that are selected among cations of main group 2 and subgroups 1, 2, and 5 to 8 of the periodic table of chemical elements in addition to phosphate. Furthermore, an alkaline earth metal-containing phosphating solution is free from fluoride and complex fluoride while the phosphating process is carried out electrolytically. The invention further relates to a metallic workpiece that is coated accordingly as well as the use of workpieces coated in said manner.
摘要:
The invention relates to an aqueous concentrate which is stable with respect to freezing and defrosting and which contains at least one water-soluble or water-dispersible copper compound and, optionally, also a water-soluble or water-dispersible tin compound for use in a diluted state as a bath for the currentless copper plating or bronze plating of objects, especially metal objects such as iron or steel wires, characterised in that it contains at least one complexed water-soluble or water-dispersed copper compound. The invention also relates to an aqueous bath which contains at least one aqueous or water-dispersible copper compound and, optionally, a water-soluble or water-dispersible tin compound for the currentless copper plating of objects in addition to at least one brightening agent and which has an adjusted pH value of less than 2.5. The invention also relates to a method for currentless copper plating or bronze plating of an object, especially a metallic object.
摘要:
The invention relates to an aqueous concentrate which is stable with respect to freezing and defrosting and which contains at least one water-soluble or water-dispersible copper compound and, optionally, also a water-soluble or water-dispersible tin compound for use in a diluted state as a bath for the currentless copper plating or bronze plating of objects, especially metal objects such as iron or steel wires, characterized in that it contains at least one complexed water-soluble or water-dispersed copper compound. The invention also relates to an aqueous bath which contains at least one aqueous or water-dispersible copper compound and, optionally, a water-soluble or water-dispersible tin compound for the currentless copper plating of objects in addition to at least one brightening agent and which has an adjusted pH value of less than 2.5. The invention also relates to a method for currentless copper plating or bronze plating of an object, especially a metallic object.
摘要:
The invention relates to a method for coating surfaces of metal objects, especially as a pre-treatment for cold deformation or as a pre-treatment for a metal-rubber compound or to adjust friction coefficients in connection elements, used in connection elements such as screws for screwing purposes. The invention is characterised in that the optionally, already pre-coated metal objects are coated with a composition containing an aqueous, acidic phosphate, said composition containing 8-50 g/L phosphate as PO4, 0.5-30 g/L zinc ions, 0-5 g/L manganese ions, 0-8 g/L calcium ions, 0-5 g/L magnesium ions, whereby at least 0.1 g/L of calcium or/and magnesium ions are provided, 0.1-5 g/L nitroguanidine, 0.1-8 g/L chlorate or/and peroxide ions and 0-16 g/L complex fluoride (MeF4 or/and MeF6) of Me=B, Si, Ti, Hf or/and Zr and 0-5 g/L fluoride ions, whereby the total amount of complex fluoride and fluoride ions ranges from 0.1-18 g/L. The invention also relates to a phosphating method wherein the ratio of removal by pickling in relation to the layer weight of the phosphate layer is less than 75%. The invention further relates to a corresponding aqueous phosphating solution.
摘要:
A FET gas sensor having a relatively low operating temperature, for example, room temperature, is free from cross sensitivities from interfering gases by a preceding in-line filter. The sensor's service life is substantially stabilizable by using fabric-like activated charcoal filters which can be regenerated by a moderate temperature increase, and by limiting the diffusion of the analyte gas, which is made possible by the relatively small amount of gas detectable on the sensitive layer of the sensor. This substantially increases the service life of the filters. The gas sensor eliminates cross sensitivities to thereby increase the detection reliability thereof. Also, the gas sensor has relative long term stability and is economical to build. The gas sensor can read relatively weak signals generated by gas-sensitive layers, for example, without other stronger gas signals interfering with the weak signals.
摘要:
A gas sensitive field effect transistor comprises a semiconductor substrate that includes a capacitance well, and source and drain regions of a field effect transistor. A gate of the field effect transistor is separated from the semiconductor substrate by an insulator, and a gas sensitive layer separated from the gate by an air gap. The field effect transistor provides an output signal indicative of the presence of a target gas within the air gap to an amplifier, which provides an amplified output signal that is electrically coupled to the capacitance well.
摘要:
Integrated semiconductor circuits, in particular, dynamic random access memories include a multiplicity of generator circuits for generating internal voltage levels from an externally applied supply voltage. During testing, the internal voltage levels are altered by the output voltage generated at the output of the generator circuit being adapted to an externally applied test voltage. If the test voltage is outside a tolerance range, the semiconductor circuit maybe destroyed. A protection circuit connected in parallel with the generator circuit limits the output voltage.
摘要:
An integrated semiconductor memory includes word lines connected to a first voltage potential via a respective first controllable switch and a respective third controllable switch and to a second voltage potential via a respective second controllable switch. In order to test whether one of the word lines is connected to the first voltage potential via its respective first and third controllable switches, the one of the word lines is connected to a comparator circuit via the respective second controllable switch and a driver line. After the respective first and third controllable switches have been controlled into the on state, in a test operating state of the integrated semiconductor memory, the respective second controllable switch is controlled into the on state and a potential state on the word line is evaluated by the comparator circuit. The result of the evaluation is fed to an external data terminal by an evaluation signal.
摘要:
An integrated circuit includes a circuit component, a first control circuit and a switchable resistance network. An input voltage is fed to the circuit component on the input side. A control signal generated by the first control circuit is fed to the control terminal of the circuit component. With the switchable resistance network, the first resistance or the second resistance is connected between an output terminal of the circuit component and the output terminal of the integrated circuit to generate a voltage drop between the input side and the output terminal of the circuit component. The integrated circuit makes it possible to generate a current at the output terminal of the circuit component in a manner dependent on the control signal and the voltage dropped between the input side and the output terminal of the circuit component. Families of characteristic curves of transistors of an integrated circuit are determined by the integrated circuit.
摘要:
A field effect semiconductor comprises a semiconductor layer having a surface, a first and a second semiconductor region in the semiconductor layer, which are arranged next to one another at the surface of the semiconductor layer, an insulating layer between the first semiconductor region and the second semiconductor region, a semiconductor strip on the surface of the semiconductor layer, which semiconductor strip overlaps the first semiconductor region and the second semiconductor region and adjoins these. A gate overlaps the semiconductor strip at least in the region of the insulating layer. A gate dielectric insulates the gate from the semiconductor strip the first semiconductor region and the second semiconductor region. The semiconductor strip and the gate being formed such that the semiconductor strip is electrically insulating at a first predetermined gate voltage and is electrically conductive at a second predetermined gate voltagero.