公开(公告)号：US20170047296A1

公开(公告)日：2017-02-16

申请号：US15304015

申请日：2014-04-14

Applicant: Renesas Electronics Corporation

Inventor： Shinji WATANABE ,  Tsuyoshi KIDA ,  Yoshihiro ONO ,  Kentaro MORI ,  Kenji SAKATA ,  Yusuke YAMADA

IPC: H01L23/00 ,  H01L23/31

CPC classification number: H01L23/562 ,  H01L23/31 ,  H01L23/3128 ,  H01L24/02 ,  H01L24/16 ,  H01L24/42 ,  H01L24/97 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099

Abstract: In a semiconductor device according to an embodiment, a second semiconductor chip is mounted on a first rear surface of a first semiconductor chip. Also, the first rear surface of the first semiconductor chip includes a first region in which a plurality of first rear electrodes electrically connected to the second semiconductor chip via a protrusion electrode are formed and a second region which is located on a peripheral side relative to the first region and in which a first metal pattern is formed. In addition, a protrusion height of the first metal pattern with respect to the first rear surface is smaller than a protrusion height of each of the plurality of first rear electrodes with respect to the first rear surface.

Abstract translation: 在根据实施例的半导体器件中，第二半导体芯片安装在第一半导体芯片的第一后表面上。 此外，第一半导体芯片的第一后表面包括第一区域，其中形成经由突起电极电连接到第二半导体芯片的多个第一后部电极，并且第二区域位于相对于第二半导体芯片的外围侧 第一区域，并且其中形成第一金属图案。 此外，第一金属图案相对于第一后表面的突出高度小于多个第一后电极中的每一个相对于第一后表面的突出高度。

公开(公告)号：US20150179623A1

公开(公告)日：2015-06-25

申请号：US14567876

申请日：2014-12-11

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yoshihiro ONO ,  Shinji WATANABE ,  Tsuyoshi KIDA ,  Kentaro MORI ,  Kenji SAKATA ,  Yusuke YAMADA

IPC: H01L25/00 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L25/50 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L24/91 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/27334 ,  H01L2224/29015 ,  H01L2224/29036 ,  H01L2224/2919 ,  H01L2224/321 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/743 ,  H01L2224/75252 ,  H01L2224/75303 ,  H01L2224/75318 ,  H01L2224/75745 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83005 ,  H01L2224/83203 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/81 ,  H01L2224/83

Abstract: To provide a semiconductor device having improved reliability.A semiconductor chip is conveyed onto a chip mounting region of a wiring board by means of a bonding jig to electrically couple the semiconductor chip and the wiring board to each other. The bonding jig for mounting the semiconductor chip on the wiring board is equipped with a retention portion for adsorbing and retaining a logic chip, a pressing portion for pressing against the back surface of the semiconductor chip, and a sealing portion to be firmly attached to the peripheral edge portion of the back surface of the semiconductor chip. The surface of the sealing portion to be firmly attached to the back surface of the semiconductor chip is made of a resin.

Abstract translation: 提供具有提高的可靠性的半导体器件。 通过接合夹具将半导体芯片传送到布线板的芯片安装区域，以将半导体芯片和布线板彼此电耦合。 用于将半导体芯片安装在布线板上的接合夹具配备有用于吸附和保持逻辑芯片的保持部分，用于按压半导体芯片的背面的按压部分和牢固地附接到半导体芯片的密封部分 半导体芯片的背面的周边部分。 要牢固地连接到半导体芯片的背面的密封部分的表面由树脂制成。