Transient blocking unit
    1.
    发明申请
    Transient blocking unit 审中-公开
    瞬态阻断单位

    公开(公告)号:US20070035906A1

    公开(公告)日:2007-02-15

    申请号:US11503357

    申请日:2006-08-10

    IPC分类号: H02H9/06

    CPC分类号: H02H9/025

    摘要: Improved electrical transient blocking is provided with a transient blocking unit (TBU) having a partial disconnect capability. A TBU is an arrangement of voltage controlled switches that normally conducts, but switches to a disconnected state in response to an above-threshold input transient. Partial disconnection improves the power handling capability of a TBU by preventing thermal damage to the TBU. Partial TBU disconnection can be implemented to keep power dissipation in the TBU below a predetermined level Pmax, thereby avoiding thermal damage to the TBU by keeping the TBU temperature below a temperature limit Tmax. Alternatively, partial TBU disconnection can be implemented to keep TBU temperature below Tmax using direct temperature sensing and feedback.

    摘要翻译: 提供了具有部分断开能力的瞬态阻塞单元(TBU)的改进的电气瞬态阻塞。 TBU是通常导通的电压控制开关的布置,但是响应于高于阈值的输入瞬变而切换到断开状态。 部分断开通过防止TBU的热损坏提高了TBU的功率处理能力。 可以实施部分TBU断开以将TBU中的功率消耗降低到预定水平P max以下,从而通过将TBU温度保持在温度下限T max以下来避免对TBU的热损伤, SUB>。 或者,可以使用直接温度感测和反馈来实现部分TBU断开以将TBU温度保持在T 以下。

    Apparatus and method for transient blocking employing relays
    2.
    发明申请
    Apparatus and method for transient blocking employing relays 审中-公开
    采用继电器的瞬态阻塞装置和方法

    公开(公告)号:US20060238936A1

    公开(公告)日:2006-10-26

    申请号:US11410575

    申请日:2006-04-24

    IPC分类号: H02H9/00

    摘要: An apparatus and a method for uni-directional and bi-directional transient blocking. The uni-directional apparatus has a depletion mode n-channel device at its input and a normally closed relay, e.g., a micro-electro-mechanical (MEM) relay, interconnected with the depletion mode n-channel device and the input in such a way that at a predetermined current value the transient causes the normally closed relay to switch into an open state and apply a bias voltage Vn on the depletion mode n-channel device that is sufficiently high to switch it “off” thus block the transient. An analogous arrangement at the output taking advantage of the same or a second relay renders the apparatus bi-directional. The structure of the apparatus and the method of operation ensure a reliable and repeatable trip current Itrip and render the apparatus very robust and feasible for low-cost manufacture.

    摘要翻译: 一种用于单向和双向瞬态阻塞的装置和方法。 单向设备在其输入端具有耗尽模式n沟道器件和常闭继电器,例如与耗尽型n沟道器件互连的微机电(MEM)继电器,以及在这种 在预定电流值下,瞬态使常闭继电器切换到打开状态,并在足够高以切换它的耗尽型n沟道器件上施加偏置电压V N“ 关闭“从而阻止瞬态。 利用相同或第二中继器在输出端处的类似布置使设备双向。 该装置的结构和操作方法确保了可靠且可重复的跳闸电流跳闸,并且使得该装置非常坚固且可用于低成本制造。

    Terminations for semiconductor devices with floating vertical series capacitive structures
    3.
    发明申请
    Terminations for semiconductor devices with floating vertical series capacitive structures 审中-公开
    具有浮动垂直串联电容结构的半导体器件的端接

    公开(公告)号:US20070012983A1

    公开(公告)日:2007-01-18

    申请号:US11487142

    申请日:2006-07-14

    IPC分类号: H01L29/94

    摘要: This invention relates to achieving high breakdown voltage and low on-resistance in semiconductor devices that have top, intermediate and bottom regions with a controllable current path traversing any of these regions. The device has an insulating trench that is coextensive with the top and intermediate regions and girds these regions from at least one side and preferably from both or all sides. A series capacitive structure with a biased top element and a number of floating elements is disposed in the insulating trench, and the intermediate region is endowed with a capacitive property that is chosen to establish a capacitive interaction or coupling between the series capacitive structure and the intermediate region so that the breakdown voltage VBD is maximized and on-resistance is minimized. A second series capacitive structure disposed in a second insulating trench can be employed to terminate the device.

    摘要翻译: 本发明涉及在半导体器件中实现高击穿电压和低导通电阻,所述半导体器件具有穿过任何这些区域的可控电流路径的顶部区域,中间区域和底部区域。 该装置具有与顶部和中间区域共同延伸的绝缘沟槽,并且从至少一个侧面,优选地从两侧或全部侧面将这些区域线化。 具有偏置顶部元件和多个浮动元件的串联电容结构设置在绝缘沟槽中,并且中间区域具有被选择用于建立串联电容结构和中间体之间的电容性相互作用或耦合的电容性质 区域,使得击穿电压V BAT最大化,导通电阻最小化。 可以采用设置在第二绝缘沟槽中的第二串联电容结构来终止该器件。

    MOSFET device having geometry that permits frequent body contact
    5.
    发明申请
    MOSFET device having geometry that permits frequent body contact 审中-公开
    具有允许频繁接触身体的几何形状的MOSFET器件

    公开(公告)号:US20050001272A1

    公开(公告)日:2005-01-06

    申请号:US10827676

    申请日:2004-04-19

    申请人: Richard Blanchard

    发明人: Richard Blanchard

    摘要: A MOSFET device design is provided that effectively addresses the problems arising from the parasitic bipolar transistor that is intrinsic to the device. The MOSFET device comprises: (a) a body region; (b) a plurality of body contact regions; (c) a plurality of source regions; (d) a plurality of drain regions; and (d) a gate region. In plan view, the source regions and the drain regions are arranged in orthogonal rows and columns, and at least a portion of the body contact regions are bordered by four of the source and drain regions, preferably two source regions and two drain regions.

    摘要翻译: 提供了MOSFET器件设计,可有效地解决由器件固有的寄生双极晶体管产生的问题。 MOSFET器件包括:(a)体区; (b)多个身体接触区域; (c)多个源区; (d)多个漏极区域; 和(d)栅极区域。 在平面图中,源极区域和漏极区域以正交的行和列布置,并且身体接触区域的至少一部分被源极和漏极区域中的四个区隔开,优选地是两个源极区域和两个漏极区域。

    Automatic generation of print data for print jobs based on available media attributes
    6.
    发明授权
    Automatic generation of print data for print jobs based on available media attributes 有权
    根据可用的媒体属性自动生成打印作业的打印数据

    公开(公告)号:US09282219B2

    公开(公告)日:2016-03-08

    申请号:US13310220

    申请日:2011-12-02

    CPC分类号: H04N1/56 H04N1/46

    摘要: The disclosed embodiments provide a system that performs a print job. During operation, the system obtains one or more available media attributes, including a media size, a border size, and/or a media type, from a printer associated with the print job. Next, the system provides the available media attributes to an application and uses the application to automatically generate and format print data for the print job based on the available media attributes. Finally, the system sends the print job to the printer, where the print job is executed using the printer.

    摘要翻译: 所公开的实施例提供执行打印作业的系统。 在操作期间,系统从与打印作业相关联的打印机获得一个或多个可用媒体属性,包括媒体大小,边框大小和/或媒体类型。 接下来,系统向应用程序提供可用的媒体属性,并使用应用程序根据可用的媒体属性自动生成和格式化打印作业的打印数据。 最后,系统将打印作业发送到使用打印机执行打印作业的打印机。

    Low capacitance two-terminal barrier controlled TVS diodes
    7.
    发明申请
    Low capacitance two-terminal barrier controlled TVS diodes 有权
    低电容两端势垒控制TVS二极管

    公开(公告)号:US20080032462A1

    公开(公告)日:2008-02-07

    申请号:US11879424

    申请日:2007-07-17

    IPC分类号: H01L21/329

    摘要: A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and may be arranged such that the anode region provides conductivity modulation by injecting minority carriers into the channel region during conduction of the semiconductor structure. In presently preferred form the majority carriers are electrons and the minority carriers are holes. Fabrication methods are described.

    摘要翻译: 两端势垒控制TVS二极管具有消耗区域阻挡阻挡多数载流子流过阴极区附近的沟道区域,该偏压电平低于施加在阳极电极和阴极电极之间的预定钳位电压的偏置电平,并且可布置 使得阳极区域在半导体结构的导通期间通过将少数载流子注入沟道区域来提供导电性调制。 在目前优选的形式中,多数载流子是电子,而少数载流子是空穴。 描述制造方法。

    Method for Making a Semiconductor Device Including Regions of Band-Engineered Semiconductor Superlattice to Reduce Device-On Resistance
    8.
    发明申请
    Method for Making a Semiconductor Device Including Regions of Band-Engineered Semiconductor Superlattice to Reduce Device-On Resistance 有权
    制造包含带状半导体超晶格区域的半导体器件以降低器件导通电阻的方法

    公开(公告)号:US20070012999A1

    公开(公告)日:2007-01-18

    申请号:US11534343

    申请日:2006-09-22

    申请人: Richard Blanchard

    发明人: Richard Blanchard

    IPC分类号: H01L29/76 H01L21/336

    摘要: A method for making a semiconductor device which may include providing a substrate having a plurality of spaced apart superlattices therein, and forming source and drain regions in the substrate defining a channel region therebetween and with the plurality of spaced apart superlattices in the channel and/or drain regions. Each superlattice may include a plurality of stacked groups of layers, with each group including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one nonsemiconductor monolayer thereon. Moreover, the at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions.

    摘要翻译: 一种用于制造半导体器件的方法,其可以包括提供其中具有多个间隔开的超晶格的衬底,以及在衬底中形成源极和漏极区域,在衬底中限定沟道区域,以及沟道中的多个间隔开的超晶格和/或 漏区。 每个超晶格可以包括多个堆叠的层组,每个组包括限定基极半导体部分和至少一个非半导体单层的多个堆叠的基底半导体单层。 此外,至少一个非半导体单层可以被约束在相邻的基底半导体部分的晶格内。

    High voltage power MOSFET having low on-resistance

    公开(公告)号:US20060249788A1

    公开(公告)日:2006-11-09

    申请号:US11475640

    申请日:2006-06-27

    申请人: Richard Blanchard

    发明人: Richard Blanchard

    IPC分类号: H01L29/76

    摘要: A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body regions have a second conductivity type. First and second source regions of the first conductivity type are respectively located in the first and second body regions. A plurality of trenches are located below the body regions in the drift region of the epitaxial layer. The trenches, which extend toward the substrate from the first and second body regions, are filled with an epitaxially layered material that includes a dopant of the second conductivity type. The dopant is diffused from the trenches into portions of the epitaxial layer adjacent the trenches.

    Low capacitance two-terminal barrier controlled TVS diodes

    公开(公告)号:US20060131605A1

    公开(公告)日:2006-06-22

    申请号:US11020507

    申请日:2004-12-22

    IPC分类号: H01L29/74 H01L23/62

    摘要: A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode, and may be arranged such that the anode region provides conductivity modulation by injecting minority carriers into the channel region during conduction of the semiconductor structure. In presently preferred form the majority carriers are electrons and the minority carriers are holes. Fabrication methods are described.