Remote core operations in a multi-core computer
    1.
    发明授权
    Remote core operations in a multi-core computer 有权
    多核计算机中的远程核心操作

    公开(公告)号:US09471532B2

    公开(公告)日:2016-10-18

    申请号:US13025446

    申请日:2011-02-11

    摘要: A multi-core processor with a shared physical memory is described. In an embodiment a sending core sends a memory write request to a destination core so that the request may be acted upon by the destination core as if it originated from the destination core. In an example, a data structure is configured in the shared physical memory and mapped to be accessible to the sending and destination cores. In an example, the shared data structure is used as a message channel between the sending and destination cores to carry data using the memory write request. In an embodiment a notification mechanism is enabled using the shared physical memory in order to notify the destination core of events by updating a notification data structure. In an example, the notification mechanism triggers a notification process at the destination core to inform a receiving process of a notification.

    摘要翻译: 描述了具有共享物理内存的多核处理器。 在一个实施例中,发送核心向目的地核心发送存储器写入请求,使得请求可以被目的地核心作为来自目的地核心的动作。 在一个示例中,在共享物理内存中配置数据结构,并将其映射到发送和目标内核可访问。 在一个示例中,共享数据结构被用作发送和目的地核心之间的消息通道,以使用存储器写入请求携带数据。 在一个实施例中,使用共享物理存储器启用通知机制,以通过更新通知数据结构来通知目的地核心的事件。 在一个示例中,通知机制触发目的地核心处的通知处理,以通知接收进程通知。

    Remote Core Operations In A Multi-Core Computer
    2.
    发明申请
    Remote Core Operations In A Multi-Core Computer 有权
    多核计算机中的远程核心操作

    公开(公告)号:US20120210071A1

    公开(公告)日:2012-08-16

    申请号:US13025446

    申请日:2011-02-11

    IPC分类号: G06F12/08 G06F12/10

    摘要: A multi-core processor with a shared physical memory is described. In an embodiment a sending core sends a memory write request to a destination core so that the request may be acted upon by the destination core as if it originated from the destination core. In an example, a data structure is configured in the shared physical memory and mapped to be accessible to the sending and destination cores. In an example, the shared data structure is used as a message channel between the sending and destination cores to carry data using the memory write request. In an embodiment a notification mechanism is enabled using the shared physical memory in order to notify the destination core of events by updating a notification data structure. In an example, the notification mechanism triggers a notification process at the destination core to inform a receiving process of a notification.

    摘要翻译: 描述了具有共享物理内存的多核处理器。 在一个实施例中,发送核心向目的地核心发送存储器写入请求,使得请求可以被目的地核心作为来自目的地核心的动作。 在一个示例中,在共享物理内存中配置数据结构,并将其映射到发送和目标内核可访问。 在一个示例中,共享数据结构被用作发送和目的地核心之间的消息通道,以使用存储器写入请求携带数据。 在一个实施例中,使用共享物理存储器启用通知机制,以通过更新通知数据结构来通知目的地核心的事件。 在一个示例中,通知机制触发目的地核心处的通知处理,以通知接收进程通知。

    Memory management to accommodate non-maskable failures
    3.
    发明授权
    Memory management to accommodate non-maskable failures 有权
    内存管理以适应不可屏蔽的故障

    公开(公告)号:US08458514B2

    公开(公告)日:2013-06-04

    申请号:US12965631

    申请日:2010-12-10

    IPC分类号: G06F11/00

    摘要: Methods of memory management are described which can accommodate non-maskable failures in pages of physical memory. In an embodiment, when an impending non-maskable failure in a page of memory is identified, a pristine page of physical memory is used to replace the page containing the impending failure and memory mappings are updated to remap virtual pages from the failed page to the pristine page. When a new page of virtual memory is then allocated by a process, the failed page may be reused if the process identifies that it can accommodate failures and the process is provided with location information for impending failures. In another embodiment, a process may expose information on failure-tolerant regions of virtual address space such that a physical page of memory containing failures only in failure-tolerant regions may be used to store the data instead of using a pristine page.

    摘要翻译: 描述了可以容纳物理存储器页面中的不可屏蔽故障的存储器管理方法。 在一个实施例中,当识别出存储器页面中即将发生的不可屏蔽的故障时,使用物理存储器的原始页面来替换包含即将发生的故障的页面,并且更新存储器映射以将虚拟页面从故障页面重新映射到 原始页面。 当进程分配新的虚拟内存页面时,如果进程识别出可以适应故障并且为进程提供了即将发生的故障的位置信息,那么失败的页面可能会重新使用。 在另一个实施例中,过程可以暴露虚拟地址空间的容错区域的信息,使得仅在容错区域中包含故障的存储器的物理页面可以用于存储数据而不是使用原始页面。

    Memory Management to Accommodate Non-Maskable Failures
    4.
    发明申请
    Memory Management to Accommodate Non-Maskable Failures 有权
    内存管理以适应不可屏蔽的故障

    公开(公告)号:US20120151252A1

    公开(公告)日:2012-06-14

    申请号:US12965631

    申请日:2010-12-10

    IPC分类号: G06F11/20 G06F12/10

    摘要: Methods of memory management are described which can accommodate non- maskable failures in pages of physical memory. In an embodiment, when an impending non-maskable failure in a page of memory is identified, a pristine page of physical memory is used to replace the page containing the impending failure and memory mappings are updated to remap virtual pages from the failed page to the pristine page. When a new page of virtual memory is then allocated by a process, the failed page may be reused if the process identifies that it can accommodate failures and the process is provided with location information for impending failures. In another embodiment, a process may expose information on failure-tolerant regions of virtual address space such that a physical page of memory containing failures only in failure-tolerant regions may be used to store the data instead of using a pristine page.

    摘要翻译: 描述了可以容纳物理存储器页面中的不可屏蔽故障的存储器管理方法。 在一个实施例中,当识别出存储器页面中即将发生的不可屏蔽的故障时,使用物理存储器的原始页面来替换包含即将发生的故障的页面,并且更新存储器映射以将虚拟页面从故障页面重新映射到 原始页面。 当进程分配新的虚拟内存页面时,如果进程识别出可以适应故障并且为进程提供了即将发生的故障的位置信息,那么失败的页面可能会重新使用。 在另一个实施例中,过程可以暴露虚拟地址空间的容错区域的信息,使得仅在容错区域中包含故障的存储器的物理页面可以用于存储数据而不是使用原始页面。

    Remapping of inoperable memory blocks
    5.
    发明授权
    Remapping of inoperable memory blocks 有权
    重新映射不可操作的内存块

    公开(公告)号:US09092357B2

    公开(公告)日:2015-07-28

    申请号:US12915025

    申请日:2010-10-29

    摘要: Inoperable phase change memory (PCM) blocks in a PCM device are remapped to one or more operable PCM blocks, e.g. by maintaining an inoperable block table that includes an entry for each inoperable PCM block and an address of a remapped PCM block. Alternatively, the PCM blocks may be remapped by storing the address of the remapped block in the block itself, and setting a remapping bit that indicate the block has been remapped. Where the remapping is performed by a processor, an inoperable block bit may be set in a translation look aside buffer that indicates whether a virtual memory page is associated with an inoperable or remapped PCM block. When a request to access a virtual memory page is received, the processor references the inoperable block bit associated with the virtual memory page to determine whether to check for remapped PCM blocks in the inoperable block table.

    摘要翻译: PCM设备中的不可操作的相变存储器(PCM)块被重新映射到一个或多个可操作的PCM块,例如。 通过维护不可操作的块表,其包括每个不可操作的PCM块的条目和重新映射的PCM块的地址。 或者,可以通过将重映射块的地址存储在块本身中来重新映射PCM块,并且设置指示块的重映射比特已被重新映射。 在由处理器执行重新映射的情况下,可以在转换旁边的缓冲器中设置不可操作的块位,缓冲器指示虚拟存储器页是否与不可操作或重新映射的PCM块相关联。 当接收到访问虚拟存储器页面的请求时,处理器引用与虚拟存储器页面相关联的不可操作块位,以确定是否检查不可操作块表中的重新映射的PCM块。

    Privacy enhancing personal data brokerage service
    6.
    发明授权
    Privacy enhancing personal data brokerage service 有权
    隐私增强个人数据经纪服务

    公开(公告)号:US08768847B2

    公开(公告)日:2014-07-01

    申请号:US13530013

    申请日:2012-06-21

    IPC分类号: G06Q99/00 H04L29/06

    摘要: The subject disclosure is directed towards a technology by which access to a protected entity's data is controlled by a data brokerage service. The service determines whether a requesting entity has appropriate access rights to requested information, and if so, the service returns a response corresponding to the protected data. In one aspect, the protected data may be location data of a protected entity that is maintained independent of a payment instrument. The location data is used to compute feasibility information as to whether the protected entity is authorized to perform a transaction using the payment instrument.

    摘要翻译: 主题公开涉及一种技术,通过该技术,受保护实体的数据的访问由数据经纪服务来控制。 该服务确定请求实体是否对所请求的信息具有适当的访问权限,如果是,则服务返回与受保护数据相对应的响应。 在一个方面,受保护的数据可以是被保持的独立于支付工具的受保护实体的位置数据。 位置数据用于计算关于受保护实体是否被授权使用支付工具执行交易的可行性信息。

    Device Locking with Hierarchical Activity Preservation
    7.
    发明申请
    Device Locking with Hierarchical Activity Preservation 有权
    设备锁定与分层活动保存

    公开(公告)号:US20130160110A1

    公开(公告)日:2013-06-20

    申请号:US13328312

    申请日:2011-12-16

    IPC分类号: G06F21/00

    CPC分类号: G06F21/629

    摘要: Techniques are described for device locking with activity preservation at a specified level within a multi-level hierarchy of device states. Such locking enables a user to share a device with another user while specifying a particular level of access to the device, such as access to a particular class of applications, a specific application, or a specific task within an application. Determination of the authorized activity may be based on a currently active application, or on the particular user gesture. The level of functionality made available may be based on the number of times a user gesture is repeated. Gestures may include a selection of a hardware or software control on the device, issuance of a voice command, and the like.

    摘要翻译: 描述了用于设备锁定的技术,其中活动保留在设备状态的多层次结构内的指定级别。 这种锁定使得用户能够在指定对设备的特定访问级别(例如访问特定类别的应用,特定应用或应用内的特定任务)的同时与另一用户共享设备。 授权活动的确定可以基于当前活动的应用程序,或者基于特定的用户手势。 提供的功能级别可以基于重复用户手势的次数。 手势可以包括对设备上的硬件或软件控制的选择,发出语音命令等。

    FLEXIBLE NOTIFICATION MECHANISM FOR USER-LEVEL INTERRUPTS
    8.
    发明申请
    FLEXIBLE NOTIFICATION MECHANISM FOR USER-LEVEL INTERRUPTS 有权
    用于用户级别中断的灵活通知机制

    公开(公告)号:US20110040915A1

    公开(公告)日:2011-02-17

    申请号:US12633034

    申请日:2009-12-08

    IPC分类号: G06F13/24

    摘要: A method includes delivering a user-level interrupt message indicative of a user-level interrupt to one or more recipients according to a user-level interrupt delivery configuration selected from a plurality of user-level interrupt delivery configurations. The one or more recipients correspond to one or more application threads executing on one or more processor cores of a plurality of processor cores in a multi-core system. A method includes generating an indicator of a user-level interrupt being undeliverable to one or more intended recipients of a user-level interrupt message according to a failed delivery notification mode configuration. The user-level interrupt may be issued by an application thread executing on a first processor core of a plurality of processor cores in a multi-core system.

    摘要翻译: 一种方法包括根据从多个用户级中断传递配置中选择的用户级中断传送配置向一个或多个接收者传递指示用户级中断的用户级中断消息。 一个或多个接收者对应于在多核系统中的多个处理器核的一个或多个处理器核上执行的一个或多个应用线程。 一种方法包括根据失败的递送通知模式配置,生成用户级别中断的指示符,该用户级别中断无法传送给用户级中断消息的一个或多个预期接收者。 用户级中断可以由在多核系统中的多个处理器核的第一处理器核上执行的应用程序线程发出。

    Adaptive snoop-and-forward mechanisms for multiprocessor systems
    9.
    发明授权
    Adaptive snoop-and-forward mechanisms for multiprocessor systems 失效
    多处理器系统的自适应窥探和转发机制

    公开(公告)号:US07437520B2

    公开(公告)日:2008-10-14

    申请号:US11178924

    申请日:2005-07-11

    IPC分类号: G06F12/00

    摘要: In a network-based cache-coherent multiprocessor system, when a node receives a cache request, the node can perform an intra-node cache snoop operation and forward the cache request to a subsequent node in the network. A snoop-and-forward prediction mechanism can be used to predict whether lazy forwarding or eager forwarding is used in processing the incoming cache request. With lazy forwarding, the node cannot forward the cache request to the subsequent node until the corresponding intra-node cache snoop operation is completed. With eager forwarding, the node can forward the cache request to the subsequent node immediately, before the corresponding intra-node cache snoop operation is completed. Furthermore, the snoop-and-forward prediction mechanism can be enhanced seamlessly with an appropriate snoop filter to avoid unnecessary intra-node cache snoop operations.

    摘要翻译: 在基于网络的高速缓存相关多处理器系统中,当节点接收到高速缓存请求时,节点可以执行节点内缓存侦听操作,并将缓存请求转发到网络中的后续节点。 可以使用侦听和转发预测机制来预测在处理传入缓存请求中是否使用惰性转发或热切换转发。 使用惰性转发,节点不能将缓存请求转发到后续节点,直到对应的节点内缓存侦听操作完成。 通过急切转发,节点可以在对应的节点内高速缓存监听操作完成之前立即将高速缓存请求转发到后续节点。 此外,可以与适当的窥探过滤器无缝地增强窥探和转发预测机制,以避免不必要的节点内缓存侦听操作。

    Progressive authentication
    10.
    发明授权
    Progressive authentication 有权
    逐行认证

    公开(公告)号:US08839358B2

    公开(公告)日:2014-09-16

    申请号:US13222538

    申请日:2011-08-31

    IPC分类号: G06F7/04 G06F17/30

    摘要: Progressive authentication is generally employed to establish the authenticity of a user, such as a user of a computing device, or a user that wants to access a proprietary data item, software application or on-line service. This can entail inputting authentication factors each of which corresponds to one or multiple attributes associated with the user, or historical patterns of one or more attributes associated with the user, or both, and a confidence level that estimates a reliability of the factor. Sensor readings captured by one or more sensors are also input. Each sensor senses a user attribute and are used to quantify each authentication factor confidence level. An overall confidence level is established based at least in part on a combination of the individual confidence levels. A user is then designated as being authentic whenever the established overall confidence level exceeds a prescribed authentication level. This process can be continuous with the overall confidence level being continually updated.

    摘要翻译: 通常采用逐行认证来建立用户(诸如计算设备的用户)或希望访问专有数据项,软件应用程序或在线服务的用户的真实性。 这可能需要输入每个对应于与用户相关联的一个或多个属性的认证因素,或与用户相关联的一个或多个属性的历史模式或两者,以及估计因子的可靠性的置信水平。 一个或多个传感器捕获的传感器读数也被输入。 每个传感器感测用户属性,并用于量化每个认证因子置信水平。 至少部分地基于个体置信水平的组合建立整体置信水平。 只要建立的总体置信水平超过规定的认证级别,用户被指定为是可信的。 这个过程可以持续,整体置信水平不断更新。