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    Vertical dual loadlock chamber
    1.
    发明授权
    Vertical dual loadlock chamber 失效
    垂直双重装载室

    公开(公告)号：US5909994A

    公开(公告)日：1999-06-08

    申请号：US749611

    申请日：1996-11-18

    申请人： Rick Blum ,  Kevin Fairbairn ,  Christopher Lane

    发明人： Rick Blum ,  Kevin Fairbairn ,  Christopher Lane

    IPC分类号： H01L21/00 ,  H01L21/677 ,  B65G1/10

    CPC分类号： H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/67754 ,  Y10S414/137 ,  Y10S414/139

    摘要： A vacuum loadlock is provided for housing a pair of wafers in proper alignment for concurrent processing. In one embodiment, a single chamber loadlock is provided with a gas diffuser disposed therein to decrease venting times within the loadlock. In another embodiment, a dual chamber loadlock is provided having first and second isolatable regions disposed adjacent a transfer region to increase throughput of the system.

    摘要翻译： 提供了真空负载锁，用于容纳一对正确对准的一对晶片以进行并行处理。 在一个实施例中，单室负载锁具有设置在其中的气体扩散器，以减少负载锁中的通气时间。 在另一个实施例中，提供双室负载锁，其具有邻近传送区域设置的第一和第二隔离区域，以增加系统的吞吐量。

    Front end wafer staging with wafer cassette turntables and on-the-fly wafer center finding
    2.
    发明授权
    Front end wafer staging with wafer cassette turntables and on-the-fly wafer center finding 失效
    具有晶圆盒转盘的前端晶片分级和即时晶片中心发现

    公开(公告)号：US6082950A

    公开(公告)日：2000-07-04

    申请号：US752463

    申请日：1996-11-18

    申请人： Allen Altwood ,  Kelly Colborne ,  Kevin Fairbairn ,  Christopher Lane ,  Hari K. Ponnekanti ,  Satish Sundar

    发明人： Allen Altwood ,  Kelly Colborne ,  Kevin Fairbairn ,  Christopher Lane ,  Hari K. Ponnekanti ,  Satish Sundar

    IPC分类号： H01L21/677 ,  B65H5/08

    CPC分类号： H01L21/67778 ,  H01L21/67742 ,  H01L21/67745 ,  Y10S414/137

    摘要： A front end staging method and apparatus is provided to introduce and remove a set of wafers from a vacuum processing system. The system generally comprises a support platform, one or more wafer cassette turntables disposed on the platform, a wafer handler disposed adjacent the turntables, a wafer center finding device and a filter disposed to control particles in the vicinity of the wafers. The wafer cassette turntables are rotatably mounted to the support in the preferred embodiment. The processing system may also include one or more processing chambers, where each processing chamber defines a plurality of isolated processing regions therein. The wafer center finding device may include an optical sensor system including optimal emitters aligned with optical sensors.

    摘要翻译： 提供了一种前端分级方法和装置，以从真空处理系统引入和移除一组晶片。 该系统通常包括支撑平台，设置在平台上的一个或多个晶片盒转盘，与转台相邻设置的晶片处理器，晶片中心发现装置和设置成控制晶片附近的颗粒的滤光器。 在优选实施例中，晶片盒转盘可旋转地安装到支撑件上。 处理系统还可以包括一个或多个处理室，其中每个处理室在其中限定多个隔离的处理区域。 晶片中心发现装置可以包括光学传感器系统，其包括与光学传感器对准的最佳发射器。

    Load-lock with external staging area
    4.
    发明授权
    Load-lock with external staging area 有权
    加载锁定与外部分段区域

    公开(公告)号：US06486444B1

    公开(公告)日：2002-11-26

    申请号：US09505901

    申请日：2000-02-17

    申请人： Kevin Fairbairn ,  Howard E. Grunes ,  Christopher Lane ,  Kelly A. Colborne

    发明人： Kevin Fairbairn ,  Howard E. Grunes ,  Christopher Lane ,  Kelly A. Colborne

    IPC分类号： F27B514

    CPC分类号： H01L21/68707 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/67745

    摘要： The present invention generally provides a vacuum system having a small-volume load-lock chamber for supporting a substrate set of only two rows of substrates, which provides for quick evacuation and venting of the load-lock chamber to provide a continuous feed load-lock chamber. More particularly, the present invention provides a transfer chamber; one or more processing chambers connected to the transfer chamber; a substrate handling robot disposed in the transfer chamber; and at least one load-lock chamber connected to the transfer chamber, and having one or more substrate support members for supporting one or more stacks of only two substrates per stack. Another aspect of the invention provides a staging, or storage rack associated with or integrated with the load-lock chamber. More particularly, the staging, or storage rack may be located outside the transfer chamber and accessible by a staging robot serving the load-lock chamber. The staging or storage rack may temporarily store processed substrates for cooling of the substrates prior to replacing the substrates within substrate cassettes during idle time of the staging robot. In this way, the substrates may continue to be cooled without interrupting the operation of the load-lock chamber.

    摘要翻译： 本发明通常提供了一种真空系统，其具有小体积的负载锁定室，用于支撑只有两排衬底的衬底组，其提供加载锁定室的快速排空和排气以提供连续的进料装载锁定 房间。 更具体地说，本发明提供一种传送室; 连接到传送室的一个或多个处理室; 设置在所述传送室中的基板处理机器人; 以及连接到传送室的至少一个装载锁定室，并且具有一个或多个衬底支撑构件，用于每堆叠一个或多个仅支撑两个衬底的堆叠。 本发明的另一方面提供了一种与负载锁定室相关联或与其结合的分段或存储架。 更具体地，分段或存储架可以位于传送室外部并且可由用于加载锁定室的分段机器人接近。 在分级机器人的空闲时间期间，在更换基板盒内的基板之前，分段或存放架可临时存储用于冷却基板的经处理的基板。 以这种方式，基板可以继续冷却而不中断加载锁定室的操作。

    Single loadlock chamber with wafer cooling function
    5.
    发明授权
    Single loadlock chamber with wafer cooling function 失效
    单个负载锁定室具有晶圆冷却功能

    公开(公告)号：US5902088A

    公开(公告)日：1999-05-11

    申请号：US749612

    申请日：1996-11-18

    申请人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne

    发明人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne

    IPC分类号： B65G49/07 ,  H01L21/00 ,  H01L21/677

    CPC分类号： H01L21/67742 ,  H01L21/67201 ,  H01L21/67754 ,  Y10S414/137 ,  Y10S414/139

    摘要： A vacuum loadlock is provided for housing a pair of wafers in proper alignment for concurrent processing. In one embodiment, a single chamber loadlock is provided with a gas diffuser disposed therein to decrease venting times within the loadlock. In another embodiment, a dual chamber loadlock is provided having first and second isolatable region disposed adjacent a transfer region to increase throughput of the system.

    摘要翻译： 提供了真空负载锁，用于容纳一对正确对准的一对晶片以进行并行处理。 在一个实施例中，单室负载锁具有设置在其中的气体扩散器，以减少负载锁中的通气时间。 在另一个实施例中，提供双室负载锁，其具有邻近传送区域设置的第一和第二隔离区域，以增加系统的吞吐量。

    Ultra high throughput wafer vacuum processing system
    6.
    发明授权
    Ultra high throughput wafer vacuum processing system 失效
    超高产量晶圆真空处理系统

    公开(公告)号：US5855681A

    公开(公告)日：1999-01-05

    申请号：US751485

    申请日：1996-11-18

    申请人： Dan Maydan ,  Sasson Somekh ,  Ashok Sinha ,  Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Hari K. Ponnekanti ,  W. N.(Nick) Taylor

    发明人： Dan Maydan ,  Sasson Somekh ,  Ashok Sinha ,  Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Hari K. Ponnekanti ,  W. N.(Nick) Taylor

    IPC分类号： H01L21/00 ,  H01L21/205 ,  H01L21/677 ,  H01L21/687 ,  C23C16/00 ,  C23F1/02

    CPC分类号： H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/68707 ,  H01L21/68785

    摘要： The present invention generally provides a cassette-to-cassette vacuum processing system which concurrently processes multiple wafers and combines the advantages of single wafer process chambers and multiple wafer handling for high quality wafer processing, high wafer throughput and reduced footprint. In accordance with one aspect of the invention, the system is preferably a staged vacuum system which generally includes a loadlock chamber for introducing wafers into the system and which also provides wafer cooling following processing, a transfer chamber for housing a wafer handler, and one or more processing chambers each having two or more processing regions which are isolatable from each other and preferably share a common gas supply and a common exhaust pump. The processing regions also preferably include separate gas distribution assemblies and RF power sources to provide a uniform plasma density over a wafer surface in each processing region. The processing chambers are configured to allow multiple, isolated processes to be performed concurrently in at least two processing regions so that at least two wafers can be processed simultaneously in a chamber with a high degree of process control provided by shared gas sources, shared exhaust systems, separate gas distribution assemblies, separate RF power sources, and separate temperature control systems.

    摘要翻译： 本发明通常提供一种盒式到盒式真空处理系统，其同时处理多个晶片，并且结合了单晶片处理室和多个晶片处理的优点，用于高质量晶片处理，高晶圆吞吐量和减小的占地面积。 根据本发明的一个方面，该系统优选地是分级真空系统，其通常包括用于将晶片引入系统中并且还提供后续处理的晶片冷却的负载锁定室，用于容纳晶片处理器的传送室，以及一个或 更多的处理室具有可彼此隔离的两个或更多个处理区域，并且优选地共享公共气体供应源和公共排气泵。 处理区域还优选地包括单独的气体分配组件和RF功率源，以在每个处理区域中在晶片表面上提供均匀的等离子体密度。 处理室被配置为允许在至少两个处理区域中同时执行多个隔离过程，使得可以在室内同时处理至少两个晶片，具有由共用气源提供的高程度的过程控制，共用排气系统 ，独立的气体分配组件，独立的射频电源和独立的温度控制系统。

    Dual blade robot
    7.
    发明授权
    Dual blade robot 失效
    双刀片机器人

    公开(公告)号：US5838121A

    公开(公告)日：1998-11-17

    申请号：US752471

    申请日：1996-11-18

    申请人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Satish Sundar

    发明人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Satish Sundar

    IPC分类号： B25J11/00 ,  B65G49/07 ,  H01L21/677 ,  H01L21/687 ,  B25J18/00

    CPC分类号： H01L21/68707 ,  H01L21/67742 ,  Y10T464/30 ,  Y10T74/20317

    摘要： A multi-blade wafer handling device is provided to concurrently move two or more wafers through a vacuum processing system. The wafer handling device includes two motors magnetically coupled into a transfer chamber to move an arm assembly connected to a dual blade assembly. The preferred wafer handling device includes a first rotating member operated by the first motor, a second rotating member operated by the second motor, a blade assembly having at least first and second wafer blades wherein the wafer blades are co-planar, and an arm assembly connecting the first and second rotating members to the blade assembly.

    摘要翻译： 提供多刀片晶片处理装置，以通过真空处理系统同时移动两个或更多个晶片。 晶片处理装置包括磁耦合到传送室中以移动连接到双刀片组件的臂组件的两个电动机。 优选的晶片处理装置包括由第一电动机操作的第一旋转构件，由第二电动机操作的第二旋转构件，具有至少第一和第二晶片叶片的叶片组件，其中晶片叶片是共面的，以及臂组件 将第一和第二旋转构件连接到叶片组件。

    METHOD AND SYSTEM FOR GNSS ASSISTANCE DATA OR LTO DATA DOWNLOAD OVER A BROADCAST BAND
    8.
    发明申请
    METHOD AND SYSTEM FOR GNSS ASSISTANCE DATA OR LTO DATA DOWNLOAD OVER A BROADCAST BAND 有权
    GNSS辅助数据的方法和系统或通过广播带的LTO数据下载

    公开(公告)号：US20100220004A1

    公开(公告)日：2010-09-02

    申请号：US12394152

    申请日：2009-02-27

    申请人： Steven Malkos ,  Christopher Lane

    发明人： Steven Malkos ,  Christopher Lane

    IPC分类号： G01S1/00

    CPC分类号： G01S19/39 ,  G01S19/05 ,  G01S19/35

    摘要： A combined GNSS and FM receiver receives FM signals comprising satellite navigation data from an AGNSS server. Associated navigation information such as a position fix is determined based on the received satellite navigation data. The received satellite navigation data are GNSS assistance data or LTO data. The AGNSS server generates the satellite navigation data by acquiring GNSS data from a satellite reference network. The acquired GNSS data comprise, for example, GPS data, GLONASS data and/or GALILEO data. The generated satellite navigation data are broadcasted as FM signals through RDS and/or RBDS to the combined GNSS and FM receiver. The combined GNSS and FM receiver receives updated satellite navigation data in subsequent FM signals, periodically or aperiodically, and updates associated navigation information, accordingly. The combined GNSS and FM receiver decodes the received FM radio signals for the updated satellite navigation data generated at the AGNSS server before being transmitted.

    摘要翻译： 组合的GNSS和FM接收器接收包括来自AGNSS服务器的卫星导航数据的FM信号。 基于接收到的卫星导航数据来确定诸如位置锁定的相关导航信息。 接收到的卫星导航数据是GNSS辅助数据或LTO数据。 AGNSS服务器通过从卫星参考网络获取GNSS数据来生成卫星导航数据。 所获取的GNSS数据包括例如GPS数据，GLONASS数据和/或GALILEO数据。 生成的卫星导航数据通过RDS和/或RBDS作为FM信号广播到组合的GNSS和FM接收机。 组合的GNSS和FM接收机在周期性或不定期地接收后续FM信号中的更新的卫星导航数据，并相应地更新相关的导航信息。 组合的GNSS和FM接收机解码所接收的FM无线电信号，以便在发送之前在AGNSS服务器处生成的更新的卫星导航数据。