公开(公告)号：US5902088A

公开(公告)日：1999-05-11

申请号：US749612

申请日：1996-11-18

申请人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne

发明人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne

IPC分类号： B65G49/07 ,  H01L21/00 ,  H01L21/677

CPC分类号： H01L21/67742 ,  H01L21/67201 ,  H01L21/67754 ,  Y10S414/137 ,  Y10S414/139

摘要： A vacuum loadlock is provided for housing a pair of wafers in proper alignment for concurrent processing. In one embodiment, a single chamber loadlock is provided with a gas diffuser disposed therein to decrease venting times within the loadlock. In another embodiment, a dual chamber loadlock is provided having first and second isolatable region disposed adjacent a transfer region to increase throughput of the system.

摘要翻译： 提供了真空负载锁，用于容纳一对正确对准的一对晶片以进行并行处理。 在一个实施例中，单室负载锁具有设置在其中的气体扩散器，以减少负载锁中的通气时间。 在另一个实施例中，提供双室负载锁，其具有邻近传送区域设置的第一和第二隔离区域，以增加系统的吞吐量。

公开(公告)号：US5855681A

公开(公告)日：1999-01-05

申请号：US751485

申请日：1996-11-18

申请人： Dan Maydan ,  Sasson Somekh ,  Ashok Sinha ,  Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Hari K. Ponnekanti ,  W. N.(Nick) Taylor

发明人： Dan Maydan ,  Sasson Somekh ,  Ashok Sinha ,  Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Hari K. Ponnekanti ,  W. N.(Nick) Taylor

IPC分类号： H01L21/00 ,  H01L21/205 ,  H01L21/677 ,  H01L21/687 ,  C23C16/00 ,  C23F1/02

CPC分类号： H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/68707 ,  H01L21/68785

摘要： The present invention generally provides a cassette-to-cassette vacuum processing system which concurrently processes multiple wafers and combines the advantages of single wafer process chambers and multiple wafer handling for high quality wafer processing, high wafer throughput and reduced footprint. In accordance with one aspect of the invention, the system is preferably a staged vacuum system which generally includes a loadlock chamber for introducing wafers into the system and which also provides wafer cooling following processing, a transfer chamber for housing a wafer handler, and one or more processing chambers each having two or more processing regions which are isolatable from each other and preferably share a common gas supply and a common exhaust pump. The processing regions also preferably include separate gas distribution assemblies and RF power sources to provide a uniform plasma density over a wafer surface in each processing region. The processing chambers are configured to allow multiple, isolated processes to be performed concurrently in at least two processing regions so that at least two wafers can be processed simultaneously in a chamber with a high degree of process control provided by shared gas sources, shared exhaust systems, separate gas distribution assemblies, separate RF power sources, and separate temperature control systems.

摘要翻译： 本发明通常提供一种盒式到盒式真空处理系统，其同时处理多个晶片，并且结合了单晶片处理室和多个晶片处理的优点，用于高质量晶片处理，高晶圆吞吐量和减小的占地面积。 根据本发明的一个方面，该系统优选地是分级真空系统，其通常包括用于将晶片引入系统中并且还提供后续处理的晶片冷却的负载锁定室，用于容纳晶片处理器的传送室，以及一个或 更多的处理室具有可彼此隔离的两个或更多个处理区域，并且优选地共享公共气体供应源和公共排气泵。 处理区域还优选地包括单独的气体分配组件和RF功率源，以在每个处理区域中在晶片表面上提供均匀的等离子体密度。 处理室被配置为允许在至少两个处理区域中同时执行多个隔离过程，使得可以在室内同时处理至少两个晶片，具有由共用气源提供的高程度的过程控制，共用排气系统 ，独立的气体分配组件，独立的射频电源和独立的温度控制系统。

公开(公告)号：US6082950A

公开(公告)日：2000-07-04

申请号：US752463

申请日：1996-11-18

申请人： Allen Altwood ,  Kelly Colborne ,  Kevin Fairbairn ,  Christopher Lane ,  Hari K. Ponnekanti ,  Satish Sundar

发明人： Allen Altwood ,  Kelly Colborne ,  Kevin Fairbairn ,  Christopher Lane ,  Hari K. Ponnekanti ,  Satish Sundar

IPC分类号： H01L21/677 ,  B65H5/08

CPC分类号： H01L21/67778 ,  H01L21/67742 ,  H01L21/67745 ,  Y10S414/137

摘要： A front end staging method and apparatus is provided to introduce and remove a set of wafers from a vacuum processing system. The system generally comprises a support platform, one or more wafer cassette turntables disposed on the platform, a wafer handler disposed adjacent the turntables, a wafer center finding device and a filter disposed to control particles in the vicinity of the wafers. The wafer cassette turntables are rotatably mounted to the support in the preferred embodiment. The processing system may also include one or more processing chambers, where each processing chamber defines a plurality of isolated processing regions therein. The wafer center finding device may include an optical sensor system including optimal emitters aligned with optical sensors.

摘要翻译： 提供了一种前端分级方法和装置，以从真空处理系统引入和移除一组晶片。 该系统通常包括支撑平台，设置在平台上的一个或多个晶片盒转盘，与转台相邻设置的晶片处理器，晶片中心发现装置和设置成控制晶片附近的颗粒的滤光器。 在优选实施例中，晶片盒转盘可旋转地安装到支撑件上。 处理系统还可以包括一个或多个处理室，其中每个处理室在其中限定多个隔离的处理区域。 晶片中心发现装置可以包括光学传感器系统，其包括与光学传感器对准的最佳发射器。

公开(公告)号：US5838121A

公开(公告)日：1998-11-17

申请号：US752471

申请日：1996-11-18

申请人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Satish Sundar

发明人： Kevin Fairbairn ,  Christopher Lane ,  Kelly Colborne ,  Satish Sundar

IPC分类号： B25J11/00 ,  B65G49/07 ,  H01L21/677 ,  H01L21/687 ,  B25J18/00

CPC分类号： H01L21/68707 ,  H01L21/67742 ,  Y10T464/30 ,  Y10T74/20317

摘要： A multi-blade wafer handling device is provided to concurrently move two or more wafers through a vacuum processing system. The wafer handling device includes two motors magnetically coupled into a transfer chamber to move an arm assembly connected to a dual blade assembly. The preferred wafer handling device includes a first rotating member operated by the first motor, a second rotating member operated by the second motor, a blade assembly having at least first and second wafer blades wherein the wafer blades are co-planar, and an arm assembly connecting the first and second rotating members to the blade assembly.

摘要翻译： 提供多刀片晶片处理装置，以通过真空处理系统同时移动两个或更多个晶片。 晶片处理装置包括磁耦合到传送室中以移动连接到双刀片组件的臂组件的两个电动机。 优选的晶片处理装置包括由第一电动机操作的第一旋转构件，由第二电动机操作的第二旋转构件，具有至少第一和第二晶片叶片的叶片组件，其中晶片叶片是共面的，以及臂组件 将第一和第二旋转构件连接到叶片组件。

公开(公告)号：US5909994A

公开(公告)日：1999-06-08

申请号：US749611

申请日：1996-11-18

申请人： Rick Blum ,  Kevin Fairbairn ,  Christopher Lane

发明人： Rick Blum ,  Kevin Fairbairn ,  Christopher Lane

IPC分类号： H01L21/00 ,  H01L21/677 ,  B65G1/10

CPC分类号： H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/67754 ,  Y10S414/137 ,  Y10S414/139

摘要： A vacuum loadlock is provided for housing a pair of wafers in proper alignment for concurrent processing. In one embodiment, a single chamber loadlock is provided with a gas diffuser disposed therein to decrease venting times within the loadlock. In another embodiment, a dual chamber loadlock is provided having first and second isolatable regions disposed adjacent a transfer region to increase throughput of the system.

摘要翻译： 提供了真空负载锁，用于容纳一对正确对准的一对晶片以进行并行处理。 在一个实施例中，单室负载锁具有设置在其中的气体扩散器，以减少负载锁中的通气时间。 在另一个实施例中，提供双室负载锁，其具有邻近传送区域设置的第一和第二隔离区域，以增加系统的吞吐量。

公开(公告)号：US20060102078A1

公开(公告)日：2006-05-18

申请号：US10991722

申请日：2004-11-18

申请人： Kevin Fairbairn ,  Hari Ponnekanti ,  Christopher Lane ,  Robert Weiss ,  Ian Latchford ,  Terry Bluck

发明人： Kevin Fairbairn ,  Hari Ponnekanti ,  Christopher Lane ,  Robert Weiss ,  Ian Latchford ,  Terry Bluck

IPC分类号： C23C16/00 ,  H01L21/306

CPC分类号： H01L21/67201 ,  H01L21/67161 ,  H01L21/67173 ,  H01L21/6719 ,  H01L21/67745

摘要： Described is a method for manufacturing wafers and a manufacturing system in which the footprint is substantially contained in a size approximating the processing chambers. Single wafers move horizontally through the system and processing occurs simultaneously in groups of processing chambers. Various manufacturing processes employed in making semiconductor wafers are included as processing chambers in the system.

摘要翻译： 描述了一种用于制造晶片的方法和制造系统，其中占地面积基本上包含在接近处理室的尺寸中。 单个晶片水平移动通过系统，处理在一组处理室中同时进行。 在制造半导体晶片中使用的各种制造工艺被包括在系统中作为处理室。

公开(公告)号：US06486444B1

公开(公告)日：2002-11-26

申请号：US09505901

申请日：2000-02-17

申请人： Kevin Fairbairn ,  Howard E. Grunes ,  Christopher Lane ,  Kelly A. Colborne

发明人： Kevin Fairbairn ,  Howard E. Grunes ,  Christopher Lane ,  Kelly A. Colborne

IPC分类号： F27B514

CPC分类号： H01L21/68707 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67742 ,  H01L21/67745

摘要： The present invention generally provides a vacuum system having a small-volume load-lock chamber for supporting a substrate set of only two rows of substrates, which provides for quick evacuation and venting of the load-lock chamber to provide a continuous feed load-lock chamber. More particularly, the present invention provides a transfer chamber; one or more processing chambers connected to the transfer chamber; a substrate handling robot disposed in the transfer chamber; and at least one load-lock chamber connected to the transfer chamber, and having one or more substrate support members for supporting one or more stacks of only two substrates per stack. Another aspect of the invention provides a staging, or storage rack associated with or integrated with the load-lock chamber. More particularly, the staging, or storage rack may be located outside the transfer chamber and accessible by a staging robot serving the load-lock chamber. The staging or storage rack may temporarily store processed substrates for cooling of the substrates prior to replacing the substrates within substrate cassettes during idle time of the staging robot. In this way, the substrates may continue to be cooled without interrupting the operation of the load-lock chamber.

摘要翻译： 本发明通常提供了一种真空系统，其具有小体积的负载锁定室，用于支撑只有两排衬底的衬底组，其提供加载锁定室的快速排空和排气以提供连续的进料装载锁定 房间。 更具体地说，本发明提供一种传送室; 连接到传送室的一个或多个处理室; 设置在所述传送室中的基板处理机器人; 以及连接到传送室的至少一个装载锁定室，并且具有一个或多个衬底支撑构件，用于每堆叠一个或多个仅支撑两个衬底的堆叠。 本发明的另一方面提供了一种与负载锁定室相关联或与其结合的分段或存储架。 更具体地，分段或存储架可以位于传送室外部并且可由用于加载锁定室的分段机器人接近。 在分级机器人的空闲时间期间，在更换基板盒内的基板之前，分段或存放架可临时存储用于冷却基板的经处理的基板。 以这种方式，基板可以继续冷却而不中断加载锁定室的操作。

公开(公告)号：US06573030B1

公开(公告)日：2003-06-03

申请号：US09590322

申请日：2000-06-08

申请人： Kevin Fairbairn ,  Michael Rice ,  Timothy Weidman ,  Christopher S Ngai ,  Ian Scot Latchford ,  Christopher Dennis Bencher ,  Yuxiang May Wang

发明人： Kevin Fairbairn ,  Michael Rice ,  Timothy Weidman ,  Christopher S Ngai ,  Ian Scot Latchford ,  Christopher Dennis Bencher ,  Yuxiang May Wang

IPC分类号： G03F700

CPC分类号： H01L21/76829 ,  C23C16/26 ,  H01L21/0276 ,  H01L21/28035 ,  H01L21/3081 ,  H01L21/3088 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3146 ,  H01L21/31612 ,  H01L21/32137 ,  H01L21/76802 ,  H01L21/76807

摘要： A method of forming an integrated circuit using an amorphous carbon film. The amorphous carbon film is formed by thermally decomposing a gas mixture comprising a hydrocarbon compound and an inert gas. The amorphous carbon film is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the amorphous carbon film is used as a hardmask. In another integrated circuit fabrication process, the amorphous carbon film is an anti-reflective coating (ARC) for deep ultraviolet (DUV) lithography. In yet another integrated circuit fabrication process, a multi-layer amorphous carbon anti-reflective coating is used for DUV lithography.

摘要翻译： 一种使用无定形碳膜形成集成电路的方法。 无定形碳膜通过热分解包含烃化合物和惰性气体的气体混合物而形成。 无定形碳膜与集成电路制造工艺兼容。 在一个集成电路制造工艺中，非晶碳膜用作硬掩模。 在另一个集成电路制造工艺中，无定形碳膜是用于深紫外（DUV）光刻的抗反射涂层（ARC）。 在又一集成电路制造工艺中，多层无定形碳抗反射涂层用于DUV光刻。

公开(公告)号：US06364995B1

公开(公告)日：2002-04-02

申请号：US09561262

申请日：2000-04-27

申请人： Kevin Fairbairn ,  Romuald Nowak

发明人： Kevin Fairbairn ,  Romuald Nowak

IPC分类号： C23F102

CPC分类号： H01J37/32091 ,  H01J37/321 ,  H01J37/3244

摘要： A non-conductive dome-shaped portion having a plurality of different radii as a dielectric inductive coupling wall of a reactor chamber. The non-conductive dome-shaped portion having a plurality of different radii being adapted to be positioned in close underlying relationship to a coil antenna and transmissive of RF energy inductively coupled into the chamber from the coil.

摘要翻译： 具有多个不同半径作为反应室的介电感应耦合壁的非导电圆顶形部分。 具有多个不同半径的非导电圆顶形部分适于被定位成与线圈天线紧密关系，并且从线圈感应地耦合到腔室中的RF能量的透射。

公开(公告)号：US06358573B1

公开(公告)日：2002-03-19

申请号：US09585258

申请日：2000-06-02

申请人： Sébastien Raoux ,  Mandar Mudholkar ,  William N. Taylor ,  Mark Fodor ,  Judy Huang ,  David Silvetti ,  David Cheung ,  Kevin Fairbairn

发明人： Sébastien Raoux ,  Mandar Mudholkar ,  William N. Taylor ,  Mark Fodor ,  Judy Huang ,  David Silvetti ,  David Cheung ,  Kevin Fairbairn

IPC分类号： H05H124

CPC分类号： H01J37/32174 ,  C23C16/5096 ,  C23C16/517 ,  H01J37/32082

摘要： A substrate processing system that includes a ceramic substrate holder having an RF electrode embedded within the substrate holder and a gas inlet manifold spaced apart from the substrate holder. The gas inlet manifold supplies one or more process gases through multiple conical holes to a reaction zone of a substrate processing chamber within the processing system and also acts as a second RF electrode. Each conical hole has an outlet that opens into the reaction zone and an inlet spaced apart from the outlet that is smaller in diameter than said outlet. A mixed frequency RF power supply is connected to the substrate processing system with a high frequency RF power source connected to the gas inlet manifold electrode and a low frequency RF power source connected to the substrate holder electrode. An RF filter and matching network decouples the high frequency waveform from the low frequency waveform. Such a configuration allows for an enlarged process regime and provides for deposition of films, including silicon nitride films, having physical characteristics that were previously unattainable.

摘要翻译： 一种衬底处理系统，其包括陶瓷衬底保持器，其具有嵌入衬底保持器内的RF电极和与衬底保持器间隔开的气体入口歧管。 气体入口歧管将一个或多个处理气体通过多个锥形孔提供到处理系统内的衬底处理室的反应区，并且还用作第二RF电极。 每个锥形孔具有通向反应区的出口和与出口间隔开的直径小于所述出口的入口。 混合频率RF电源与连接到气体入口歧管电极的高频RF电源和连接到衬底保持器电极的低频RF电源连接到衬底处理系统。 RF滤波器和匹配网络将高频波形与低频波形分离。 这种构造允许扩大的工艺方案并且提供具有先前无法实现的物理特性的膜（包括氮化硅膜）的沉积。