Non-volatile memory device and operation method of the same

    公开(公告)号:US11205484B2

    公开(公告)日:2021-12-21

    申请号:US16752924

    申请日:2020-01-27

    摘要: A non-volatile memory device includes a memory cell array including a plurality of memory cells, a page buffer circuit, and a control logic circuit. The page buffer circuit includes a plurality of first page buffers and a plurality of second page buffers, each including a sense latch, a data latch, and a cache latch. The sense latch senses data stored in the memory cell array and dumps the sensed data to the data latch, the data latch dumps the data dumped by the sense latch to the cache latch, and the cache latch transmits the data dumped by the data latch to a data I/O circuit. While the cache latch included in at least one of the plurality of first page buffers is performing a data transmit operation, the data latch included in at least one of the plurality of second page buffers performs a data dumping operation.

    Electronic device with antenna device

    公开(公告)号:US10297900B2

    公开(公告)日:2019-05-21

    申请号:US15401022

    申请日:2017-01-07

    摘要: According to various embodiments of the present disclosure, an electronic device may include: an array antenna including a plurality of first radiating conductors that transmit or receive a wireless signal in a first frequency band and are arranged on a circuit board; and a lens unit including at least one lens disposed on a housing of the electronic device to correspond to the first radiating conductors. The lens unit may refract or reflect a wireless signal transmitted/received through each of the first radiating conductors. The electronic device as described above may be variously implemented according to embodiments. For example, a portion of the lens unit may transmit/receive a wireless signal in a frequency band that is different from the frequency band of the wireless signal transmitted/received by the first radiating conductors.

    Nonvolatile memory devices including memory planes and memory systems including the same

    公开(公告)号:US11657858B2

    公开(公告)日:2023-05-23

    申请号:US17338097

    申请日:2021-06-03

    IPC分类号: G11C7/10

    摘要: A nonvolatile memory device may include a plurality of memory planes and a plurality of plane-dedicated pad sets. The plurality of memory planes may include a plurality of memory cell arrays including nonvolatile memory cells and a plurality of page buffer circuits. Each of the plurality of page buffer circuits may be connected to ones of the nonvolatile memory cells included in each of the plurality of memory cell arrays through bitlines. A plurality of plane-dedicated pad sets may be connected to the plurality of page buffer circuits through a plurality of data paths respectively such that each of the plurality plane-dedicated pad sets is dedicatedly connected to each of the plurality of page buffer circuits. A bandwidth of a data transfer may be increased by reducing a data transfer delay and supporting a parallel data transfer, and power consumption may be decreased by removing data multiplexing and/or signal routing.