公开(公告)号：US20190164922A1

公开(公告)日：2019-05-30

申请号：US16244661

申请日：2019-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ae-nee JANG ,  KyungSeon HWANG ,  SunWon KANG

IPC: H01L23/00 ,  H01L23/48 ,  H01L21/56

Abstract: A semiconductor package includes a substrate, through-electrodes penetrating the substrate, first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate and electrically connected to the through-electrodes, respectively, and at least one second bump disposed between the first bumps and electrically insulated from the through-electrodes. The first bumps and the at least one second bump constitute one row in the first direction. A level of a bottom surface of the at least one second bump from the top surface of the substrate is a substantially same as levels of bottom surfaces of the first bumps from the top surface of the substrate.

公开(公告)号：US20210183801A1

公开(公告)日：2021-06-17

申请号：US17189405

申请日：2021-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ae-nee JANG ,  KyungSeon HWANG ,  SunWon KANG

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/48

Abstract: A semiconductor package includes a substrate, through-electrodes penetrating the substrate, first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate and electrically connected to the through-electrodes, respectively, and at least one second bump disposed between the first bumps and electrically insulated from the through-electrodes. The first bumps and the at least one second bump constitute one row in the first direction. A level of a bottom surface of the at least one second bump from the top surface of the substrate is a substantially same as levels of bottom surfaces of the first bumps from the top surface of the substrate.

公开(公告)号：US20170179062A1

公开(公告)日：2017-06-22

申请号：US15375196

申请日：2016-12-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ae-nee JANG ,  KyungSeon HWANG ,  SunWon KANG

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/48

CPC classification number: H01L24/14 ,  H01L21/563 ,  H01L23/481 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/10 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/73 ,  H01L2224/0345 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05025 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/0557 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/0603 ,  H01L2224/06102 ,  H01L2224/10125 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13564 ,  H01L2224/13582 ,  H01L2224/14104 ,  H01L2224/14515 ,  H01L2224/14517 ,  H01L2224/26145 ,  H01L2224/73104 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/00014 ,  H01L2924/01074 ,  H01L2924/01047 ,  H01L2924/014

Abstract: A semiconductor package includes a substrate, through-electrodes penetrating the substrate, first bumps spaced apart from each other in a first direction parallel to a top surface of the substrate and electrically connected to the through-electrodes, respectively, and at least one second bump disposed between the first bumps and electrically insulated from the through-electrodes. The first bumps and the at least one second bump constitute one row in the first direction. A level of a bottom surface of the at least one second bump from the top surface of the substrate is a substantially same as levels of bottom surfaces of the first bumps from the top surface of the substrate.