公开(公告)号：US11380635B2

公开(公告)日：2022-07-05

申请号：US17121898

申请日：2020-12-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Se-Ho You ,  Seongho Shin ,  Bangweon Lee

IPC: H01L23/66 ,  H01L23/00

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.

公开(公告)号：US20150001715A1

公开(公告)日：2015-01-01

申请号：US14487287

申请日：2014-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yonghoon Kim ,  Keung Beum Kim ,  Seongho Shin ,  Seung-Yong Cha ,  Inho Choi

IPC: H01L23/00 ,  H01L25/18

CPC classification number: H01L24/17 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.

Abstract translation: 提供一种半导体器件，其包括第一半导体封装，第二半导体封装和连接结构。 第一半导体封装包括第一衬底。 第一基板包括第一区域和第二区域。 第二半导体封装安装在第一半导体封装上。 连接结构电连接第二半导体封装和第一半导体封装。 连接结构包括在第一区域的第一连接图案。 第一连接图案在第一区域提供数据信号。 连接结构还包括在第二区域处的第二连接图案。 第二连接模式在第二区域提供控制/寻址信号。 多个第二连接图案小于第一连接图案的数量。

公开(公告)号：US08866310B2

公开(公告)日：2014-10-21

申请号：US13746853

申请日：2013-01-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yonghoon Kim ,  Keung Beum Kim ,  Seongho Shin ,  Seung-Yong Cha ,  Inho Choi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/498 ,  H01L23/00 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L24/17 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.

Abstract translation: 提供一种半导体器件，其包括第一半导体封装，第二半导体封装和连接结构。 第一半导体封装包括第一衬底。 第一基板包括第一区域和第二区域。 第二半导体封装安装在第一半导体封装上。 连接结构电连接第二半导体封装和第一半导体封装。 连接结构包括在第一区域的第一连接图案。 第一连接图案在第一区域提供数据信号。 连接结构还包括在第二区域处的第二连接图案。 第二连接模式在第二区域提供控制/寻址信号。 多个第二连接图案小于第一连接图案的数量。

公开(公告)号：US20240421054A1

公开(公告)日：2024-12-19

申请号：US18617964

申请日：2024-03-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongho Shin ,  Donguk Kim

IPC: H01L23/498 ,  H01L23/00

Abstract: A semiconductor package according to an embodiment may include a printed circuit board that includes a first pad portion, a semiconductor chip that is mounted on the printed circuit board and includes a second pad portion, a coupling part that is between the first pad portion and the second pad portion, and a spacer that is between the coupling part and the first pad portion. The first pad portion and the second pad portion may be electrically coupled to each other through the coupling part and the spacer.

公开(公告)号：US09041222B2

公开(公告)日：2015-05-26

申请号：US14487287

申请日：2014-09-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yonghoon Kim ,  Keung Beum Kim ,  Seongho Shin ,  Seung-Yong Cha ,  Inho Choi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  H01L23/498 ,  H01L25/10 ,  H01L25/18 ,  H01L25/065

CPC classification number: H01L24/17 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.

Abstract translation: 提供一种半导体器件，其包括第一半导体封装，第二半导体封装和连接结构。 第一半导体封装包括第一衬底。 第一基板包括第一区域和第二区域。 第二半导体封装安装在第一半导体封装上。 连接结构电连接第二半导体封装和第一半导体封装。 连接结构包括在第一区域的第一连接图案。 第一连接图案在第一区域提供数据信号。 连接结构还包括在第二区域处的第二连接图案。 第二连接模式在第二区域提供控制/寻址信号。 多个第二连接图案小于第一连接图案的数量。

公开(公告)号：US20250038090A1

公开(公告)日：2025-01-30

申请号：US18615675

申请日：2024-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minjin Kim ,  Seongho Shin

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: The present disclosure relates to semiconductor packages. An example semiconductor package comprises a package substrate that includes a signal pad and a ground pad, an interposer substrate on the package substrate, a semiconductor chip on the interposer substrate, a plurality of signal lines on a top surface of the package substrate, and a first connection terminal between the package substrate and the interposer substrate. Each signal line of the plurality of signal lines extends in a first direction. The plurality of signal lines and the signal pad are spaced apart in a second direction that intersects the first direction. The plurality of signal lines, the signal pad, and the ground pad are in contact with the top surface of the package substrate. The first connection terminal overlaps at least a portion of the plurality of signal lines in a plan view.

公开(公告)号：US20230420349A1

公开(公告)日：2023-12-28

申请号：US18125409

申请日：2023-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Narae Shin ,  Seongho Shin ,  Seonghwan Jeon

IPC: H01L23/498 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/4985 ,  H01L23/49827 ,  H01L24/16 ,  H01L2224/16227 ,  H01L23/3107

Abstract: A semiconductor package includes a base film, a first conductive structure disposed on a first surface of the base film, a second conductive structure disposed on a second surface of the base film, a via passing through the base film and connecting the first conductive structure to the second conductive structure, a semiconductor chip on the first surface and electrically connected to the first conductive structure, a first insulating layer covering the first conductive structure and including a first opening exposing a first conductive pattern of the first conductive structure, a first conductive layer disposed on the first insulating layer, covering the first insulating layer and the semiconductor chip, and contacting a region of the first conductive pattern exposed by the first opening, and a second conductive layer disposed on the second surface, covering the second conductive structure, and contacting at least a portion of the second conductive structure.

公开(公告)号：US11855013B2

公开(公告)日：2023-12-26

申请号：US17834020

申请日：2022-06-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Se-Ho You ,  Seongho Shin ,  Bangweon Lee

IPC: H01L23/66 ,  H01L23/00

CPC classification number: H01L23/66 ,  H01L24/20 ,  H01L2223/6616 ,  H01L2223/6677 ,  H01L2924/1421

Abstract: A semiconductor device may include a substrate, a first semiconductor chip buried in the substrate, a first antenna pattern, a second antenna pattern, and outer terminals. A bottom surface of the substrate may include first and second regions spaced apart from each other. The first semiconductor chip may have a first active surface that is directed to the top surface of a core portion of the substrate. The first antenna pattern may be provided on the top surface of the substrate and electrically connected to the first semiconductor chip. The outer terminals may be provided on the first region of the bottom surface of the substrate, and the second antenna pattern may be provided on the second region of the bottom surface of the substrate.

公开(公告)号：US20130313706A1

公开(公告)日：2013-11-28

申请号：US13746853

申请日：2013-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yonghoon Kim ,  Keung Beum Kim ,  Seongho Shin ,  Seung-Yong Cha ,  Inho Choi

IPC: H01L23/00

CPC classification number: H01L24/17 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.