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公开(公告)号：US10283708B2
公开(公告)日：2019-05-07
申请号：US15452373
申请日：2017-03-07
发明人： Ming-Che Wu , Deepak Kamalanathan , Juan Saenz , Tanmay Kumar
IPC分类号： H01L45/00 , H01L27/24 , H01L27/105 , G11C13/00 , H01L27/115
摘要： A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line includes a first portion and a second portion including an electrically conductive carbon-containing material. The nonvolatile memory material includes a semiconductor material layer and a conductive oxide material layer, with the semiconductor material layer disposed adjacent the second portion of the word line.
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公开(公告)号：US10153430B1
公开(公告)日：2018-12-11
申请号：US15621305
申请日：2017-06-13
发明人： Deepak Kamalanathan , Juan Saenz
CPC分类号： H01L45/08 , H01L27/2481 , H01L45/146 , H01L45/1683
摘要： Systems and methods for providing a Barrier Modulated Cell (BMC) structure with reduced shifting in stored memory cell resistance levels over time are described. The BMC structure may comprise a reversible resistance-switching memory element within a memory array comprising a first conductive metal oxide (e.g., titanium oxide) in series with an alternating stack of one or more layers of an amorphous low bandgap material (e.g., germanium) with one or more layers of a second conductive metal oxide (e.g., aluminum oxide). The BMC structure may include a barrier layer comprising a first conductive metal oxide, such as titanium oxide or strontium titanate, in series with a germanium stack that includes a layer of amorphous germanium or amorphous silicon germanium paired with a second conductive metal oxide. The second conductive metal oxide (e.g., aluminum oxide) may be different from the first conductive metal oxide (e.g., titanium oxide).
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公开(公告)号：US20180261766A1
公开(公告)日：2018-09-13
申请号：US15452373
申请日：2017-03-07
发明人： Ming-Che Wu , Deepak Kamalanathan , Juan Saenz , Tanmay Kumar
CPC分类号： H01L45/1608 , G11C7/18 , G11C8/14 , G11C13/0007 , G11C2213/35 , G11C2213/71 , H01L27/2436 , H01L27/2454 , H01L27/249 , H01L45/04 , H01L45/06 , H01L45/1206 , H01L45/1233 , H01L45/124 , H01L45/146 , H01L45/16
摘要： A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The word line includes a first portion and a second portion including an electrically conductive carbon-containing material. The nonvolatile memory material includes a semiconductor material layer and a conductive oxide material layer, with the semiconductor material layer disposed adjacent the second portion of the word line.
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公开(公告)号：US20180247975A1
公开(公告)日：2018-08-30
申请号：US15441284
申请日：2017-02-24
发明人： Juan Saenz , Deepak Kamalanathan , Guangle Zhou , Ming-Che Wu , Tanmay Kumar
CPC分类号： H01L27/249 , H01L27/2454 , H01L45/10 , H01L45/1233 , H01L45/1253 , H01L45/14 , H01L45/1683
摘要： A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.
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公开(公告)号：US20180277208A1
公开(公告)日：2018-09-27
申请号：US15714463
申请日：2017-09-25
发明人： Deepak Kamalanathan , Juan P. Saenz , Tanmay Kumar , Emmanuelle Merced-Grafals , Sebastian J. M. Wicklein
CPC分类号： G11C13/0069 , G11C11/5664 , G11C11/5685 , G11C13/0007 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C2013/0073 , G11C2213/54 , G11C2213/71 , G11C2213/78 , G11C2213/79 , H01L27/2454 , H01L27/2481 , H01L27/249 , H01L45/08 , H01L45/1226 , H01L45/1246 , H01L45/146
摘要： A memory device is provided that includes a memory controller coupled to a memory cell including a barrier modulated switching structure. The memory controller is adapted to program the memory cell to a first programming state, and program the memory cell to one of a plurality of target programming states from the first programming state.
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公开(公告)号：US10283567B2
公开(公告)日：2019-05-07
申请号：US15441284
申请日：2017-02-24
发明人： Juan Saenz , Deepak Kamalanathan , Guangle Zhou , Ming-Che Wu , Tanmay Kumar
摘要： A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.
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公开(公告)号：US20180358550A1
公开(公告)日：2018-12-13
申请号：US15621305
申请日：2017-06-13
发明人： Deepak Kamalanathan , Juan Saenz
CPC分类号： H01L45/08 , H01L27/2481 , H01L45/146 , H01L45/1683
摘要： Systems and methods for providing a Barrier Modulated Cell (BMC) structure with reduced shifting in stored memory cell resistance levels over time are described. The BMC structure may comprise a reversible resistance-switching memory element within a memory array comprising a first conductive metal oxide (e.g., titanium oxide) in series with an alternating stack of one or more layers of an amorphous low bandgap material (e.g., germanium) with one or more layers of a second conductive metal oxide (e.g., aluminum oxide). The BMC structure may include a barrier layer comprising a first conductive metal oxide, such as titanium oxide or strontium titanate, in series with a germanium stack that includes a layer of amorphous germanium or amorphous silicon germanium paired with a second conductive metal oxide. The second conductive metal oxide (e.g., aluminum oxide) may be different from the first conductive metal oxide (e.g., titanium oxide).
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公开(公告)号：US20180315794A1
公开(公告)日：2018-11-01
申请号：US15498255
申请日：2017-04-26
摘要： A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line. The nonvolatile memory material includes a semiconductor material layer, and a conductive oxide material layer including a first conductive oxide material layer portion and a second conductive oxide material layer portion. The method also includes forming a barrier material layer between the first conductive oxide material layer portion and the second conductive oxide material layer portion.
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