公开(公告)号：US10032908B1

公开(公告)日：2018-07-24

申请号：US15400244

申请日：2017-01-06

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Perumal Ratnam ,  Christopher Petti ,  Juan Saenz ,  Guangle Zhou ,  Abhijit Bandyopadhyay ,  Tanmay Kumar

IPC: H01L29/78 ,  H01L27/24 ,  H01L29/423 ,  H01L23/528 ,  H01L29/66

Abstract: A matrix rail structure is formed over a substrate. The matrix rail structure includes a pair of lengthwise sidewalls that extend along a first horizontal direction and comprises, or is at least partially subsequently replaced with, a set of at least one gate electrode rail extending along the first horizontal direction and straight-sidewalled gate dielectrics. A pair of vertical semiconductor channel strips and a pair of laterally-undulating gate dielectrics can be formed on sidewalls of the matrix rail structure for each vertical field effect transistor. At least one laterally-undulating gate electrode extending along the first horizontal direction is formed on the laterally-undulating gate dielectrics. Bottom active regions and top active regions are formed at end portions of the vertical semiconductor channel strips. The vertical field effect transistors can be formed as a two-dimensional array, and may be employed as access transistors for a three-dimensional memory device.

公开(公告)号：US10283567B2

公开(公告)日：2019-05-07

申请号：US15441284

申请日：2017-02-24

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Juan Saenz ,  Deepak Kamalanathan ,  Guangle Zhou ,  Ming-Che Wu ,  Tanmay Kumar

IPC: H01L27/24 ,  H01L45/00

Abstract: A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.

公开(公告)号：US09806256B1

公开(公告)日：2017-10-31

申请号：US15299919

申请日：2016-10-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Ming-Che Wu ,  Chuanbin Pan ,  Guangle Zhou ,  Tanmay Kumar

IPC: H01L45/00 ,  G11C13/00

CPC classification number: H01L45/124 ,  G11C13/0007 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2213/51 ,  G11C2213/52 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/085 ,  H01L45/1246 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/1675

Abstract: A resistive memory device includes a first electrode, a sidewall spacer electrode located on a sidewall of a dielectric material contacting the first electrode, a resistive memory cell containing a resistive memory material and contacting the sidewall spacer electrode, and a second electrode containing the resistive memory cell.

公开(公告)号：US20180166559A1

公开(公告)日：2018-06-14

申请号：US15376916

申请日：2016-12-13

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Guangle Zhou ,  Chuanbin Pan ,  Juan Saenz ,  Tanmay Kumar

IPC: H01L29/66 ,  H01L27/11521 ,  H01L27/11568 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/24 ,  H01L45/00

CPC classification number: H01L29/66666 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/2454 ,  H01L27/249 ,  H01L29/7827 ,  H01L45/04 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/146 ,  H01L45/147

Abstract: A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, the word line including a first portion including a first conductive material and a second portion including a second conductive material, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, the semiconductor material layer disposed adjacent the second portion of the word line, and forming a memory cell including the nonvolatile memory material at an intersection of the local bit line and the word line.

公开(公告)号：US09768180B1

公开(公告)日：2017-09-19

申请号：US15338372

申请日：2016-10-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Guangle Zhou ,  Yubao Li ,  Yangyin Chen ,  Tanmay Kumar

IPC: H01L21/00 ,  H01L27/115 ,  H01L21/8234 ,  H01L21/306

CPC classification number: H01L27/11582

Abstract: A method is provided that includes forming a dielectric material above a substrate, forming a hole in the dielectric material, the hole disposed in a first direction, forming a word line layer above the substrate via the hole, the word line layer disposed in a second direction perpendicular to the first direction, the word line layer including a first conductive material having a first work function, forming a nonvolatile memory material on a sidewall of the hole, the nonvolatile memory material including a semiconductor material layer and a conductive oxide material layer, forming a local bit line in the hole, the local bit line including a second conductive material having a second work function, wherein the first work function is greater than the second work function, and forming a memory cell comprising the nonvolatile memory material at an intersection of the local bit line and the word line layer.

公开(公告)号：US09595530B1

公开(公告)日：2017-03-14

申请号：US15204286

申请日：2016-07-07

Applicant: SanDisk Technologies LLC

Inventor： Guangle Zhou

IPC: H01L27/24 ,  H01L27/115

CPC classification number: H01L27/11521 ,  G11C13/0023 ,  G11C13/0026 ,  G11C2213/71 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/2436 ,  H01L27/2454 ,  H01L27/249 ,  H01L45/04 ,  H01L45/1226 ,  H01L45/146

Abstract: A method is provided that includes forming a first vertical bit line disposed in a first direction above a substrate, forming a first word line disposed in a second direction above the substrate, the second direction perpendicular to the first direction, forming a first memory cell comprising a nonvolatile memory material at an intersection of the first vertical bit line and the first word line, forming a transistor above the substrate, and forming a first bit line select device coupled between the first vertical bit line and the transistor.

Abstract translation: 提供了一种方法，其包括形成沿衬底上方的第一方向设置的第一垂直位线，形成沿着衬底上方的第二方向设置的第一字线，垂直于第一方向的第二方向，形成第一存储单元， 在所述第一垂直位线和所述第一字线的交叉点处的非易失性存储器材料，在所述衬底上形成晶体管，以及形成耦合在所述第一垂直位线和所述晶体管之间的第一位线选择器件。

公开(公告)号：US20180247975A1

公开(公告)日：2018-08-30

申请号：US15441284

申请日：2017-02-24

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Juan Saenz ,  Deepak Kamalanathan ,  Guangle Zhou ,  Ming-Che Wu ,  Tanmay Kumar

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/249 ,  H01L27/2454 ,  H01L45/10 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/14 ,  H01L45/1683

Abstract: A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line, the nonvolatile memory material including a semiconductor material layer and conductive oxide material layer, forming a first barrier material layer between the word line and the nonvolatile memory material, forming a second barrier material layer between the bit line and the nonvolatile memory material, and forming a memory cell including the nonvolatile memory material at an intersection of the bit line and the word line.