公开(公告)号：US11437500B2

公开(公告)日：2022-09-06

申请号：US17167332

申请日：2021-02-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Shinya Sasagawa ,  Motomu Kurata ,  Masashi Tsubuku

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L27/146

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

公开(公告)号：US20210327937A1

公开(公告)日：2021-10-21

申请号：US17315600

申请日：2021-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Ryota Hodo ,  Yuta Ilda

IPC: H01L27/146 ,  H01L21/768 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786

Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

公开(公告)号：US11088286B2

公开(公告)日：2021-08-10

申请号：US16645669

申请日：2018-09-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Ryota Hodo ,  Daisuke Matsubayashi ,  Motomu Kurata ,  Ryunosuke Honda

IPC: H01L21/02 ,  H01L29/66 ,  H01L27/105 ,  H01L29/786 ,  H01L29/24

Abstract: A semiconductor device with excellent electric characteristics is provided. The semiconductor device includes an oxide in a channel formation region. The semiconductor device includes the oxide over a substrate, a first insulator over the oxide, a second insulator over the first insulator, a third insulator, and a conductor over the third insulator. The oxide and the first insulator are in contact with each other in a region. An opening exposing the oxide is provided in the first insulator and the second insulator. The third insulator is placed to cover an inner wall and a bottom surface of the opening. The conductor is placed to fill the opening. The conductor has a region overlapping with the oxide with the third insulator between the conductor and the oxide. The first insulator contains an element other than a main component of the oxide.

公开(公告)号：US11004882B2

公开(公告)日：2021-05-11

申请号：US16592068

申请日：2019-10-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Ryota Hodo ,  Yuta Iida

IPC: H01L21/768 ,  H01L27/146 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L21/8258 ,  H01L23/00 ,  H01L27/06 ,  H01L27/1156

Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.

公开(公告)号：US10367096B2

公开(公告)日：2019-07-30

申请号：US15814925

申请日：2017-11-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Shinya Sasagawa ,  Satoru Okamoto ,  Motomu Kurata ,  Yuta Endo

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L27/12 ,  H01L21/8258 ,  H01L27/06 ,  H01L21/66

Abstract: A semiconductor device which includes a transistor having a miniaturized structure is provided. A first insulator is provided over a stack in which a semiconductor, a first conductor, and a second conductor are stacked in this order. Over the first insulator, an etching mask is formed. Using the etching mask, the first insulator and the second conductor are etched until the first conductor is exposed. After etching the first conductor until the semiconductor is exposed so as to form a groove having a smaller width than the second conductor, a second insulator and a third conductor are formed sequentially.

公开(公告)号：US10164120B2

公开(公告)日：2018-12-25

申请号：US15576445

申请日：2016-05-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Motomu Kurata ,  Shinya Sasagawa ,  Katsuaki Tochibayashi ,  Satoru Okamoto ,  Akihisa Shimomura

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/28 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L27/06 ,  H01L27/08 ,  H01L27/088 ,  H01L27/092 ,  H01L27/105 ,  H01L27/108 ,  H01L29/788 ,  H01L29/792 ,  H01L27/115 ,  H01L51/50 ,  H01L27/146 ,  H05B33/14 ,  G06F9/32 ,  G06K19/07 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L27/12 ,  G02F1/1368 ,  H01L27/32

Abstract: A transistor including a semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator is manufactured by forming a hard mask layer including a fourth conductor over the second insulator, a third insulator over the fourth conductor, forming an opening portion in the second insulator with the hard mask layer as the mask, eliminating the hard mask layer by forming the opening portion, and forming the first insulator and the first conductor in the opening portion.

公开(公告)号：US10134879B2

公开(公告)日：2018-11-20

申请号：US15461575

申请日：2017-03-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hideomi Suzawa ,  Shinya Sasagawa ,  Motomu Kurata ,  Masashi Tsubuku

IPC: H01L29/66 ,  H01L29/786 ,  H01L21/02 ,  H01L27/12 ,  H01L27/146

Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

公开(公告)号：US09824898B2

公开(公告)日：2017-11-21

申请号：US15429547

申请日：2017-02-10

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shinya Sasagawa ,  Motomu Kurata ,  Katsuaki Tochibayashi

IPC: H01L29/40 ,  H01L21/44 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4757 ,  H01L29/45 ,  H01L29/49 ,  H01L27/12

CPC classification number: H01L21/44 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/47573 ,  H01L27/1218 ,  H01L27/1225 ,  H01L29/401 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device using an oxide semiconductor. The semiconductor device includes a first electrode layer; a second electrode layer positioned over the first electrode layer and including a stacked-layer structure of a first conductive layer and a second conductive layer; and an oxide semiconductor film and an insulating film positioned between the first electrode layer and the second electrode layer in a thickness direction. The first conductive layer and the insulating film have a first opening portion in a region overlapping with the first electrode layer, The oxide semiconductor film has a second opening portion in a region overlapping with the first opening portion. The second conductive layer is in contact with the first electrode layer exposed in the first opening portion and the second opening portion.

公开(公告)号：US09768318B2

公开(公告)日：2017-09-19

申请号：US15019004

申请日：2016-02-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yoshinobu Asami ,  Yutaka Okazaki ,  Motomu Kurata ,  Katsuaki Tochibayashi ,  Shinya Sasagawa ,  Kensuke Yoshizumi ,  Hideomi Suzawa

IPC: H01L29/49 ,  H01L29/786 ,  H01L29/66 ,  H01L21/4757 ,  H01L21/47 ,  H01L21/477 ,  H01L33/00

CPC classification number: H01L29/7869 ,  H01L21/47 ,  H01L21/4757 ,  H01L21/477 ,  H01L27/1207 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78648 ,  H01L33/00

Abstract: A miniaturized transistor, a transistor with low parasitic capacitance, a transistor with high frequency characteristics, or a semiconductor device including the transistor is provided. The semiconductor device includes a first insulator, an oxide semiconductor over the first insulator, a first conductor and a second conductor that are in contact with the oxide semiconductor, a second insulator that is over the first and second conductors and has an opening reaching the oxide semiconductor, a third insulator over the oxide semiconductor and the second insulator, and a fourth conductor over the third insulator. The first conductor includes a first region and a second region. The second conductor includes a third region and a fourth region. The second region faces the third region with the first conductor and the first insulator interposed therebetween. The second region is thinner than the first region. The third region is thinner than the fourth region.

公开(公告)号：US09570622B2

公开(公告)日：2017-02-14

申请号：US14476921

申请日：2014-09-04

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shinya Sasagawa ,  Motomu Kurata ,  Katsuaki Tochibayashi

IPC: H01L29/786 ,  H01L27/12 ,  H01L21/02

CPC classification number: H01L21/44 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/47573 ,  H01L27/1218 ,  H01L27/1225 ,  H01L29/401 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a highly reliable semiconductor device using an oxide semiconductor. The semiconductor device includes a first electrode layer; a second electrode layer positioned over the first electrode layer and including a stacked-layer structure of a first conductive layer and a second conductive layer; and an oxide semiconductor film and an insulating film positioned between the first electrode layer and the second electrode layer in a thickness direction. The first conductive layer and the insulating film have a first opening portion in a region overlapping with the first electrode layer. The oxide semiconductor film has a second opening portion in a region overlapping with the first opening portion. The second conductive layer is in contact with the first electrode layer exposed in the first opening portion and the second opening portion.

Abstract translation: 提供使用氧化物半导体的高度可靠的半导体器件。 半导体器件包括第一电极层; 位于所述第一电极层上并包括第一导电层和第二导电层的层叠结构的第二电极层; 以及在厚度方向上位于第一电极层和第二电极层之间的氧化物半导体膜和绝缘膜。 第一导电层和绝缘膜在与第一电极层重叠的区域中具有第一开口部。 氧化物半导体膜在与第一开口部重叠的区域中具有第二开口部。 第二导电层与暴露在第一开口部分和第二开口部分中的第一电极层接触。