公开(公告)号：US11751409B2

公开(公告)日：2023-09-05

申请号：US17466442

申请日：2021-09-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Tamae Moriwaka ,  Yuta Endo

IPC: H10B69/00 ,  H01L29/786 ,  H01L27/06 ,  G11C7/16 ,  G11C8/14 ,  G11C11/403 ,  G11C11/408 ,  H10B41/20 ,  H10B41/70 ,  G11C11/24 ,  H01L29/24

CPC classification number: H10B69/00 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  G11C11/4085 ,  H01L27/0688 ,  H01L29/24 ,  H01L29/7869 ,  H10B41/20 ,  H10B41/70

Abstract: To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.
A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j-lth sub memory cell.

公开(公告)号：US11538940B2

公开(公告)日：2022-12-27

申请号：US16728423

申请日：2019-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Yuta Endo ,  Yoko Tsukamoto

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/04 ,  H01L29/24 ,  H01L29/423

Abstract: To provide a miniaturized transistor having highly stable electrical characteristics. Furthermore, also in a semiconductor device including the transistor, high performance and high reliability are achieved. The transistor includes, over a substrate, a conductor, an oxide semiconductor, and an insulator. The oxide semiconductor includes a first region and a second region. The resistance of the second region is lower than that of the first region. The entire surface of the first region in the oxide semiconductor is surrounded in all directions by the conductor with the insulator interposed therebetween.

公开(公告)号：US11296231B2

公开(公告)日：2022-04-05

申请号：US16637384

申请日：2018-08-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yuta Endo ,  Hideomi Suzawa

IPC: H01L27/00 ,  H01L29/00 ,  H01L29/786 ,  H01L27/12 ,  H01L27/108

Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes first and second transistors and first and second capacitors. Each of the first and second transistors includes a gate insulator and a gate electrode over an oxide. Each of the first and second capacitors includes a conductor, a dielectric over the conductor, and the oxide. The first and second transistors are provided between the first capacitor and the second capacitor. One of a source and a drain of the first transistor is also used as one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is also used as one electrode of the first capacitor. The other of the source and the drain of the second transistor is also used as one electrode of the second capacitor. The channel lengths of the first and second transistors are larger than the lengths in a direction parallel to short sides of fourth and fifth conductors.

公开(公告)号：US11296085B2

公开(公告)日：2022-04-05

申请号：US16645665

申请日：2018-09-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa

IPC: H01L23/528 ,  H01L27/00 ,  H01L29/00 ,  H01L27/105 ,  H01L27/02 ,  H01L29/24 ,  H01L29/66 ,  H01L29/786

Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes a first transistor, a second transistor, and an electrode. The first transistor and the second transistor include an oxide, a gate insulator over the oxide, and a gate. The electrode is connected to one of a source and a drain of the first transistor and one of a source and a drain of the second transistor. The channel length of the first transistor is longer than the short side of the first conductor. The channel length of the second transistor is longer than the short side of the second conductor.

公开(公告)号：US11114449B2

公开(公告)日：2021-09-07

申请号：US16810902

申请日：2020-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Tamae Moriwaka ,  Yuta Endo

IPC: H01L29/10 ,  H01L27/115 ,  G11C7/16 ,  G11C8/14 ,  G11C11/24 ,  G11C11/403 ,  H01L29/786 ,  H01L27/06 ,  H01L27/1156 ,  H01L27/11551 ,  H01L29/24 ,  G11C11/408

Abstract: [Problem] To provide a semiconductor device suitable for miniaturization. To provide a highly reliable semiconductor device. To provide a semiconductor device with improved operating speed.
[Solving Means] A semiconductor device including a memory cell including first to cth (c is a natural number of 2 or more) sub memory cells, wherein: the jth sub memory cell includes a first transistor, a second transistor, and a capacitor; a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor include an oxide semiconductor; one of terminals of the capacitor is electrically connected to a gate electrode included in the second transistor; the gate electrode included in the second transistor is electrically connected to one of a source electrode and a drain electrode which are included in the first transistor; and when j≥2, the jth sub memory cell is arranged over the j−1th sub memory cell.

公开(公告)号：US10777687B2

公开(公告)日：2020-09-15

申请号：US16437642

申请日：2019-06-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hiromi Sawai ,  Hajime Kimura

IPC: H01L29/786 ,  H01L29/22 ,  H01L29/49 ,  H01L29/66 ,  H01L27/12 ,  H01L27/10

Abstract: A high-performance and highly reliable semiconductor device is provided. The semiconductor device includes: a first oxide; a source electrode; a drain electrode; a second oxide over the first oxide, the source electrode, and the drain electrode; a gate insulating film over the second oxide; and a gate electrode over the gate insulating film. The source electrode is electrically connected to the first oxide. The drain electrode is electrically connected to the first oxide. Each of the first oxide and the second oxide includes In, an element M (M is Al, Ga, Y, or Sn), and Zn. Each of the first oxide and the second oxide includes more In atoms than element M atoms. An atomic ratio of the In, the Zn, and the element M in the first oxide is equal to or similar to an atomic ratio of the In, the Zn, and the element M in the second oxide.

公开(公告)号：US10236389B2

公开(公告)日：2019-03-19

申请号：US15900845

申请日：2018-02-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Hideomi Suzawa ,  Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshiya Endo ,  Mitsuhiro Ichijo

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66 ,  H01L21/8258 ,  H01L29/423 ,  H01L29/49 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12

Abstract: A miniaturized transistor is provided. A first layer is formed over a third insulator over a semiconductor; a second layer is formed over the first layer; an etching mask is formed over the second layer; the second layer is etched using the etching mask until the first layer is exposed to form a third layer; a selective growth layer is formed on a top surface and a side surface of the third layer; the first layer is etched using the third layer and the selective growth layer until the third insulator is exposed to form a fourth layer; and the third insulator is etched using the third layer, the selective growth layer, and the fourth layer until the semiconductor is exposed to form a first insulator.

公开(公告)号：US10153360B2

公开(公告)日：2018-12-11

申请号：US15584242

申请日：2017-05-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuta Endo ,  Toshinari Sasaki ,  Kosei Noda

IPC: H01L29/66 ,  H01L29/51 ,  H01L29/423 ,  H01L21/477 ,  H01L21/425 ,  H01L29/786 ,  H01L21/02 ,  H01L21/28

Abstract: A semiconductor device is manufactured using a transistor in which an oxide semiconductor is included in a channel region and variation in electric characteristics due to a short-channel effect is less likely to be caused. The semiconductor device includes an oxide semiconductor film having a pair of oxynitride semiconductor regions including nitrogen and an oxide semiconductor region sandwiched between the pair of oxynitride semiconductor regions, a gate insulating film, and a gate electrode provided over the oxide semiconductor region with the gate insulating film positioned therebetween. Here, the pair of oxynitride semiconductor regions serves as a source region and a drain region of the transistor, and the oxide semiconductor region serves as the channel region of the transistor.

公开(公告)号：US09960279B2

公开(公告)日：2018-05-01

申请号：US14560259

申请日：2014-12-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Toshinari Sasaki ,  Kosei Noda ,  Yuhei Sato ,  Yuta Endo

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42364

Abstract: Hydrogen concentration and oxygen vacancies in an oxide semiconductor film are reduced. Reliability of a semiconductor device which includes a transistor using an oxide semiconductor film is improved. One embodiment of the present invention is a semiconductor device which includes a base insulating film; an oxide semiconductor film formed over the base insulating film; a gate insulating film formed over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween. The base insulating film shows a signal at a g value of 2.01 by electron spin resonance. The oxide semiconductor film does not show a signal at a g value of 1.93 by electron spin resonance.

公开(公告)号：US09825177B2

公开(公告)日：2017-11-21

申请号：US15217080

申请日：2016-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Shinya Sasagawa ,  Satoru Okamoto ,  Motomu Kurata ,  Yuta Endo

IPC: H01L29/00 ,  H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/8258 ,  H01L22/12 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78648

Abstract: A semiconductor device which includes a transistor having a miniaturized structure is provided. A first insulator is provided over a stack in which a semiconductor, a first conductor, and a second conductor are stacked in this order. Over the first insulator, an etching mask is formed. Using the etching mask, the first insulator and the second conductor are etched until the first conductor is exposed. After etching the first conductor until the semiconductor is exposed so as to form a groove having a smaller width than the second conductor, a second insulator and a third conductor are formed sequentially.