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公开(公告)号:US20240268092A1
公开(公告)日:2024-08-08
申请号:US18638994
申请日:2024-04-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya ONUKI , Yuto YAKUBO , Seiya SAITO
CPC classification number: H10B12/00 , H01L27/1207 , H01L27/1225 , H01L27/124 , H01L27/1255 , H01L29/24 , H01L29/78648 , H01L29/7869 , G11C5/06 , G11C8/08
Abstract: A novel semiconductor device is provided. The semiconductor device includes a driver circuit and a first transistor layer to a third transistor layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The second transistor layer includes a second memory cell including a second transistor and a second capacitor. The third transistor layer includes a switching circuit and an amplifier circuit. The first transistor is electrically connected to a first local bit line. The second transistor is electrically connected to a second local bit line. The switching circuit has a function of selecting the first local bit line or the second local bit line and electrically connecting the selected local bit line to the amplifier circuit. The first transistor layer to the third transistor layer are provided over the silicon substrate. The third transistor layer is provided between the first transistor layer and the second transistor layer.
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公开(公告)号:US20220246185A1
公开(公告)日:2022-08-04
申请号:US17606116
申请日:2020-05-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuto YAKUBO , Seiya SAITO , Tatsuya ONUKI
IPC: G11C7/12 , H01L27/108
Abstract: Provision of a novel semiconductor device. The semiconductor device includes a first control circuit including a first transistor using a silicon substrate for a channel; a second control circuit provided over the first control circuit, which includes a second transistor using a metal oxide for a channel; a memory circuit provided over the second control circuit, which includes a third transistor using a metal oxide for a channel; and a global bit line and an inverted global bit line that have a function of transmitting a signal between the first control circuit and the second control circuit. The first control circuit includes a sense amplifier circuit including an input terminal and an inverted input terminal. In a first period for reading data from the memory circuit to the first control circuit, the second control circuit controls whether the global bit line and the inverted global bit line from which electric charge is discharged are charged or not in accordance with the data read from the memory circuit.
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公开(公告)号:US20240194252A1
公开(公告)日:2024-06-13
申请号:US18584118
申请日:2024-02-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiya SAITO , Yuto YAKUBO , Tatsuya ONUKI , Shuhei NAGATSUKA
IPC: G11C11/4097 , G11C11/4091 , H01L29/786 , H10B12/00
CPC classification number: G11C11/4097 , G11C11/4091 , H01L29/7869 , H10B12/30 , H10B12/50
Abstract: A novel semiconductor device is provided. The semiconductor device includes a driver circuit including a plurality of transistors using a silicon substrate for channels, and a first transistor layer and a second transistor layer including a plurality of transistors using a metal oxide for channels. The first transistor layer and the second transistor layer are provided over the silicon substrate layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The first transistor is electrically connected to a first local bit line. The second transistor layer includes a second transistor whose gate is electrically connected to the first local bit line and a first correction circuit electrically connected to the second transistor. The first correction circuit is electrically connected to a first global bit line. The first correction circuit has a function of holding a voltage corresponding to a threshold voltage of the second transistor in the gate of the second transistor.
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公开(公告)号:US20220085073A1
公开(公告)日:2022-03-17
申请号:US17422312
申请日:2019-11-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya ONUKI , Yuto YAKUBO , Yuki OKAMOTO , Seiya SAITO , Kiyoshi KATO , Shunpei YAMAZAKI
IPC: H01L27/12 , G11C11/4091 , G11C11/4096
Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a first element layer including a first memory cell, a second element layer including a second memory cell, and a silicon substrate including a driver circuit. The first element layer is provided between the silicon substrate and the second element layer. The first memory cell includes a first transistor and a first capacitor. The second memory cell includes a second transistor and a second capacitor. One of a source and a drain of the first transistor and one of a source and a drain of the second transistor are each electrically connected to a wiring for electrical connection to the driver circuit. The wiring is in contact with a first semiconductor layer included in the first transistor and a second semiconductor layer included in the second transistor and is provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate.
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公开(公告)号:US20250055087A1
公开(公告)日:2025-02-13
申请号:US18724035
申请日:2022-12-16
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazutaka KURIKI , Seiya SAITO , Teruaki OCHIAI , Kengo AKIMOTO
IPC: H01M50/136 , H01G11/28 , H01G11/50 , H01M4/02 , H01M4/04 , H01M4/38 , H01M4/525 , H01M50/105
Abstract: The relative position shifts of a positive electrode and a negative electrode occur owing to bending in charge or discharge, whereby uneven distribution is caused and potential varies. Not graphite but a lithium metal film is used as the negative electrode. A lithium metal film is formed over one side of the negative electrode current collector by an evaporation method or a sputtering method, and a laminated body is formed such that surfaces of two negative electrode current collectors where no film is formed are in contact with each other.
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公开(公告)号:US20250007051A1
公开(公告)日:2025-01-02
申请号:US18707723
申请日:2022-10-31
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kazutaka KURIKI , Yumiko YONEDA , Seiya SAITO , Tatsuyoshi TAKAHASHI
IPC: H01M50/129 , H01M50/54
Abstract: A secondary battery that has flexibility and can inhibit degradation of a positive electrode lead connection portion or a negative electrode lead connection portion is provided. The secondary battery has a structure in which a positive electrode lead is connected to a positive electrode current collector exposed portion of a first positive electrode and a positive electrode current collector exposed portion of a second positive electrode while penetrating through the inner side of one opening portion of a first separator, an opening portion of a first negative electrode, and one opening portion of a second separator; a negative electrode lead is connected to a negative electrode current collector exposed portion of a first negative electrode while penetrating through the inner side of the other opening portion of the first separator; and the negative electrode lead and the negative electrode current collector exposed portion of the first negative electrode are connected to a negative electrode current collector exposed portion of a second negative electrode while penetrating through the inner side of the other opening portion of the second separator, an opening portion of the first positive electrode, an opening portion of the second positive electrode, and the other opening portion provided in a third separator.
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公开(公告)号:US20240413324A1
公开(公告)日:2024-12-12
申请号:US18703508
申请日:2022-10-14
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Seiya SAITO , Tetsuya KAKEHATA , Kazutaka KURIKI , Taisuke NAKAO , Kenji ARAI
IPC: H01M4/525 , H01M4/02 , H01M10/0525 , H01M10/0569
Abstract: A lithium ion battery having excellent discharge characteristics even at a temperature below freezing is provided. The lithium ion battery includes a positive electrode containing a positive electrode active material, an electrolyte solution, and a negative electrode containing a negative electrode active material that is a carbon material; the carbon material has peaks at 2θ of greater than or equal to 20° and less than or equal to 24°, 2θ of greater than or equal to 42° and less than or equal to 46.5°, and 2θ of greater than or equal to 78° and less than or equal to 82° in X-ray diffraction (XRD) analysis; and a value of the discharge capacity obtained by subjecting the lithium ion battery to constant current and constant voltage charging (0.1 C, 4.5 V, and a termination current of 0.01 C) at 25° C. and then discharging at −40° C. is higher than or equal to 40% of a value of the discharge capacity in discharging at 25° C.
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公开(公告)号:US20220180920A1
公开(公告)日:2022-06-09
申请号:US17439876
申请日:2020-03-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Seiya SAITO , Yuto YAKUBO , Tatsuya ONUKI , Shuhei NAGATSUKA
IPC: G11C11/4097 , G11C11/4091 , H01L27/108 , H01L29/786
Abstract: A novel semiconductor device is provided. The semiconductor device includes a driver circuit including a plurality of transistors using a silicon substrate for channels, and a first transistor layer and a second transistor layer including a plurality of transistors using a metal oxide for channels. The first transistor layer and the second transistor layer are provided over the silicon substrate layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The first transistor is electrically connected to a first local bit line. The second transistor layer includes a second transistor whose gate is electrically connected to the first local bit line and a first correction circuit electrically connected to the second transistor. The first correction circuit is electrically connected to a first global bit line. The first correction circuit has a function of holding a voltage corresponding to a threshold voltage of the second transistor in the gate of the second transistor.
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公开(公告)号:US20220093600A1
公开(公告)日:2022-03-24
申请号:US17427934
申请日:2020-02-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya ONUKI , Yuto YAKUBO , Seiya SAITO
IPC: H01L27/108 , H01L27/12 , H01L29/24 , H01L29/786
Abstract: A novel semiconductor device is provided. The semiconductor device includes a driver circuit and a first transistor layer to a third transistor layer. The first transistor layer includes a first memory cell including a first transistor and a first capacitor. The second transistor layer includes a second memory cell including a second transistor and a second capacitor. The third transistor layer includes a switching circuit and an amplifier circuit. The first transistor is electrically connected to a first local bit line. The second transistor is electrically connected to a second local bit line. The switching circuit has a function of selecting the first local bit line or the second local bit line and electrically connecting the selected local bit line to the amplifier circuit. The first transistor layer to the third transistor layer are provided over the silicon substrate. The third transistor layer is provided between the first transistor layer and the second transistor layer.
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公开(公告)号:US20210376848A1
公开(公告)日:2021-12-02
申请号:US17282098
申请日:2019-10-10
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Tatsuya ONUKI , Yuto YAKUBO , Kiyoshi KATO , Seiya SAITO
Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a sensor, an amplifier circuit to which a sensor signal of the sensor is input, a sample-and-hold circuit that retains a voltage corresponding to an output signal of an amplifier input to the sample-and-hold circuit, an analog-to-digital converter circuit to which an output signal of the sample-and-hold circuit corresponding to the voltage is input, and an interface circuit. The interface circuit has a function of switching and controlling a first control period in which the sensor signal is input to the amplifier circuit and an output signal of the amplifier circuit is retained in the sample-and-hold circuit and a second control period in which a digital signal obtained by output of the voltage retained in the sample-and-hold circuit to the analog-to-digital converter circuit is output to the interface circuit. In the first control period, the analog-to-digital converter circuit is switched to stop output of the digital signal. The first control period is longer than the second control period.
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