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公开(公告)号:US12218251B2
公开(公告)日:2025-02-04
申请号:US18626594
申请日:2024-04-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Honda , Masashi Tsubuku , Yusuke Nonaka , Takashi Shimazu , Shunpei Yamazaki
IPC: H01L29/786 , G02F1/1333 , G02F1/1337 , G02F1/1339 , G02F1/1343 , H01L27/12 , H01L29/04 , H01L29/24 , H01L29/51 , H01L29/66 , H01L21/02 , H10K59/121
Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
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公开(公告)号:US10889888B2
公开(公告)日:2021-01-12
申请号:US15189104
申请日:2016-06-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Tetsunori Maruyama , Yuki Imoto , Hitomi Sato , Masahiro Watanabe , Mitsuo Mashiyama , Kenichi Okazaki , Motoki Nakashima , Takashi Shimazu
IPC: C23C14/08 , C23C14/34 , C23C14/54 , C04B35/01 , C04B35/453 , C04B35/64 , B28B11/24 , H01L21/02 , H01L29/24 , H01L29/66 , H01L29/786
Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.
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公开(公告)号:US09530895B2
公开(公告)日:2016-12-27
申请号:US14615122
申请日:2015-02-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Honda , Masashi Tsubuku , Yusuke Nonaka , Takashi Shimazu
IPC: H01L29/10 , H01L29/12 , H01L29/786 , H01L29/04 , H01L29/423 , H01L29/49 , H01L29/66
CPC classification number: H01L29/7869 , H01L29/045 , H01L29/42376 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/78603 , H01L29/78606 , H01L29/78696
Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at. %. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.
Abstract translation: 抑制包括氧化物半导体的半导体器件中的导通电流的降低。 半导体器件包括含有硅的绝缘膜,绝缘膜上的氧化物半导体膜,在氧化物半导体膜上含有硅的栅极绝缘膜,位于栅极绝缘膜之上并与至少氧化物半导体膜重叠的栅电极 ,以及与氧化物半导体膜电连接的源电极和漏电极。 在半导体器件中,与至少栅电极重叠的氧化物半导体膜包括从绝缘膜的界面分布的硅的浓度低于或等于1.1at的区域。 %。 此外,除了该区域之外,氧化物半导体膜的剩余部分中所含的硅的浓度低于该区域中所含的硅的浓度。
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公开(公告)号:US09306072B2
公开(公告)日:2016-04-05
申请号:US13660219
申请日:2012-10-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masayuki Sakakura , Akiharu Miyanaga , Masahiro Takahashi , Takuya Hirohashi , Takashi Shimazu
IPC: H01L29/10 , H01L29/786
CPC classification number: H01L29/7869 , H01L29/78606 , H01L29/78618 , H01L29/78693 , H01L29/78696
Abstract: An object is to provide an oxide semiconductor layer having a novel structure which is preferably used for a semiconductor device. Alternatively, another object is to provide a semiconductor device using an oxide semiconductor layer having the novel structure. An oxide semiconductor layer includes an amorphous region which is mainly amorphous and a crystal region containing crystal grains of In2Ga2ZnO7 in a vicinity of a surface, in which the crystal grains are oriented so that the c-axis is almost vertical with respect to the surface. Alternatively, a semiconductor device uses such an oxide semiconductor layer.
Abstract translation: 目的在于提供一种具有新的结构的氧化物半导体层,其优选用于半导体器件。 或者,另一个目的是提供一种使用具有新颖结构的氧化物半导体层的半导体器件。 氧化物半导体层包括主要为非晶质的非晶区域和在表面附近含有In2Ga2ZnO7晶体的晶体区域,其中晶粒取向为使得c轴相对于表面几乎垂直。 或者,半导体器件使用这种氧化物半导体层。
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公开(公告)号:US08932914B2
公开(公告)日:2015-01-13
申请号:US14202670
申请日:2014-03-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Takuya Hirohashi , Masahiro Takahashi , Takashi Shimazu
IPC: H01L21/00 , H01L21/336 , H01L27/108 , H01L29/66 , H01L21/02 , H01L27/12 , H01L29/786
Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
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公开(公告)号:US08884287B2
公开(公告)日:2014-11-11
申请号:US14139892
申请日:2013-12-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Junichiro Sakata , Takashi Shimazu , Hiroki Ohara , Toshinari Sasaki , Shunpei Yamazaki
IPC: H01L29/786 , H04M1/02 , H01L21/02 , C23C14/08 , H01L27/12
CPC classification number: H01L29/78696 , C23C14/086 , H01L21/02554 , H01L21/02565 , H01L21/02573 , H01L21/02592 , H01L21/02631 , H01L27/1225 , H01L29/7869 , H01L29/78693 , H04M1/0266
Abstract: A semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics and reliability. Film deposition is performed using an oxide semiconductor target containing an insulator (an insulating oxide, an insulating nitride, silicon oxynitride, aluminum oxynitride, or the like), typically SiO2, so that the semiconductor device in which the Si-element concentration in the thickness direction of the oxide semiconductor layer has a gradient which increases in accordance with an increase in a distance from a gate electrode is realized.
Abstract translation: 一种包括具有氧化物半导体层并具有高电特性和可靠性的薄膜晶体管的半导体器件。 通常使用包含绝缘体(绝缘氧化物,绝缘氮化物,氮氧化硅,氮氧化铝等)(通常为SiO 2)的氧化物半导体靶进行膜沉积,使得其中Si元素浓度在厚度 氧化物半导体层的方向具有根据与栅电极的距离的增加而增加的梯度。
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公开(公告)号:US10290744B2
公开(公告)日:2019-05-14
申请号:US15422945
申请日:2017-02-02
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Honda , Masashi Tsubuku , Yusuke Nonaka , Takashi Shimazu , Shunpei Yamazaki
IPC: H01L29/786 , H01L29/04 , H01L29/24 , H01L29/51 , G02F1/1333 , G02F1/1337 , G02F1/1339 , G02F1/1343 , H01L27/12 , H01L29/66 , H01L21/02 , H01L27/32
Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
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公开(公告)号:US09859401B2
公开(公告)日:2018-01-02
申请号:US14586056
申请日:2014-12-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Takuya Hirohashi , Masahiro Takahashi , Takashi Shimazu
IPC: H01L31/112 , H01L21/00 , H01L29/66 , H01L21/02 , H01L27/12 , H01L29/786
CPC classification number: H01L29/66742 , H01L21/02422 , H01L21/02472 , H01L21/02483 , H01L21/02502 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L21/02667 , H01L27/1225 , H01L29/66969 , H01L29/7869
Abstract: A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.
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公开(公告)号:US09741860B2
公开(公告)日:2017-08-22
申请号:US14682356
申请日:2015-04-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Honda , Masashi Tsubuku , Yusuke Nonaka , Takashi Shimazu , Shunpei Yamazaki
IPC: H01L21/02 , H01L29/786 , H01L29/04 , H01L29/24 , H01L29/51
CPC classification number: H01L29/7869 , G02F1/133345 , G02F1/1337 , G02F1/13394 , G02F1/134309 , G02F2202/10 , H01L21/02565 , H01L27/1225 , H01L27/3262 , H01L29/045 , H01L29/24 , H01L29/51 , H01L29/66969 , H01L29/78696
Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
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公开(公告)号:US09219160B2
公开(公告)日:2015-12-22
申请号:US13626267
申请日:2012-09-25
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Tatsuya Honda , Masashi Tsubuku , Yusuke Nonaka , Takashi Shimazu , Shunpei Yamazaki
IPC: H01L29/786
CPC classification number: H01L29/78693 , H01L29/41733 , H01L29/42384 , H01L29/7869
Abstract: A decrease in on-state current in a semiconductor device including an oxide semiconductor film is suppressed. A transistor including an oxide semiconductor film, an insulating film which includes oxygen and silicon, a gate electrode adjacent to the oxide semiconductor film, the oxide semiconductor film provided to be in contact with the insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the interface with the insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region.
Abstract translation: 抑制了包括氧化物半导体膜的半导体器件中导通电流的降低。 包括氧化物半导体膜的晶体管,包括氧和硅的绝缘膜,与氧化物半导体膜相邻的栅电极,设置成与绝缘膜接触并与至少栅电极重叠的氧化物半导体膜,以及 与氧化物半导体膜电连接的源电极和漏电极。 在氧化物半导体膜中,设置成与绝缘膜的与界面接触并具有小于或等于5nm的厚度的第一区域具有低于或等于1.0at的硅浓度。 %,除了第一区域之外的氧化物半导体膜中的区域的硅浓度比第一区域低。
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