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公开(公告)号:US10386684B2
公开(公告)日:2019-08-20
申请号:US15534197
申请日:2015-12-14
发明人: Kuniaki Okada , Seiichi Uchida , Naoki Ueda , Sumio Katoh
IPC分类号: G02F1/1368 , G02F1/1362 , H01L29/786 , G02F1/1333 , G02F1/1337 , G02F1/1343 , H01L21/02 , H01L27/12 , H01L29/24 , H01L29/66
摘要: A semiconductor device (100A) includes a thin film transistor (10), an inter-layer insulation layer (22) covering the thin film transistor, and a transparent conductive layer (24) formed on the inter-layer insulation layer. The metal oxide layer (16) of the thin film transistor includes a first portion (16a) overlapping the gate electrode (12) via a gate insulation layer (14) and a second portion (16b) not overlapping the gate electrode (12). The second portion (16b) crosses a different edge (e2) different from an edge (e1) of the drain electrode (18d) on a side of the first portion when viewed in the normal direction of the substrate (11). The inter-layer insulation layer has a contact hole (22a) disposed to overlap a part of the drain electrode (18d) and at least a part of the second portion (16b) of the metal oxide layer when viewed in the normal direction of the substrate. The transparent conductive layer (24) comes into contact with the drain electrode (18d), the second portion (16b), and the gate insulation layer (14) in the contact hole (22a).
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公开(公告)号:US09613990B2
公开(公告)日:2017-04-04
申请号:US15102884
申请日:2014-08-28
发明人: Seiichi Uchida
IPC分类号: H01L27/32 , H01L27/12 , G02F1/1362 , G02F1/1368 , H01L29/786
CPC分类号: H01L27/1255 , G02F1/136213 , G02F1/1368 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/127 , H01L27/3248 , H01L27/3265 , H01L29/7869
摘要: A semiconductor device (101) includes a plurality of pixel regions Pix arranged in a matrix having a row direction and a column direction, wherein each of the plurality of pixel regions Pix includes a thin film transistor (10) which includes a gate electrode (2), a gate insulating layer (5) covering the gate electrode, an oxide semiconductor layer (7A) provided on the gate insulating layer, and a source electrode (9s) and a drain electrode (9d) which are electrically connected to the oxide semiconductor layer, a metal oxide layer (7B) formed out of a same oxide film as the oxide semiconductor layer, an interlayer insulating layer (13) covering the thin film transistor and the metal oxide layer, and a pixel electrode (15) provided on the interlayer insulating layer and electrically connected to the drain electrode, the metal oxide layer (7B) includes a conductor region (70c), and the pixel electrode (15) overlaps with at least a part of the conductor region (70c) with the interlayer insulating layer (13) interposed therebetween.
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公开(公告)号:US09276127B2
公开(公告)日:2016-03-01
申请号:US14408628
申请日:2013-06-11
发明人: Seiichi Uchida , Tadayoshi Miyamoto , Yasuyuki Ogawa , Yutaka Takamaru , Kazuatsu Ito , Takuya Matsuo , Shigeyasu Mori
IPC分类号: H01L29/10 , H01L29/786 , H01L27/12 , H01L21/02 , H01L21/425 , H01L21/441 , H01L29/24 , H01L29/45 , H01L29/66 , G02F1/1368
CPC分类号: H01L29/7869 , G02F1/1368 , H01L21/02565 , H01L21/425 , H01L21/441 , H01L21/443 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/45 , H01L29/66969
摘要: This TFT substrate (100A) includes: a gate connecting layer (3a) formed on a substrate (1) out of a same conductive film as a gate electrode (3) or a transparent connecting layer (2a) formed on the substrate (1) out of a same conductive film as a first transparent electrode (2); an oxide layer (5z) which is formed on an insulating layer (4) and which includes at least one conductor region (5a); and a source connecting layer (6a) formed on the oxide layer (5z) out of a same conductor film as a source electrode (6s). The source connecting layer (6a) is electrically connected to either the gate connecting layer (3a) or the transparent connecting layer (2a) via the at least one conductor region (5a).
摘要翻译: 该TFT基板(100A)包括:与形成在基板(1)上的栅极(3)或透明连接层(2a)相同的导电膜形成在基板(1)上的栅极连接层(3a) 与第一透明电极(2)相同的导电膜; 形成在绝缘层(4)上并且包括至少一个导体区域(5a)的氧化物层(5z); 以及在与源电极(6s)相同的导体膜上形成在氧化物层(5z)上的源极连接层(6a)。 源极连接层(6a)经由至少一个导体区域(5a)与栅极连接层(3a)或透明连接层(2a)电连接。
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公开(公告)号:US20150053969A1
公开(公告)日:2015-02-26
申请号:US14389812
申请日:2013-03-29
发明人: Kazuatsu Ito , Yutaka Takamaru , Tadayoshi MIiyamoto , Mitsunobu Miyamoto , Makoto Nakazawa , Yasuyuki Ogawa , Seiichi Uchida , Shigeyasu Mori
IPC分类号: H01L27/12 , H01L21/02 , H01L29/417
CPC分类号: H01L27/124 , H01L21/02554 , H01L21/02565 , H01L21/32051 , H01L21/76823 , H01L21/76825 , H01L21/76826 , H01L21/76829 , H01L21/76838 , H01L27/1225 , H01L27/1244 , H01L27/1259 , H01L29/41733 , H01L29/41758 , H01L29/7869 , H01L29/78693
摘要: This semiconductor device (100) includes: a gate electrode (3); a gate insulating layer (4); an oxide layer (50) which is formed on the gate insulating layer (4) and which includes a first conductor region (55) and a first semiconductor region (51) that overlaps at least partially with the gate electrode (3) with the gate insulating layer (4) interposed between them; a source electrode (6s) formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50); a drain electrode (6d) which is formed to contact with the upper surface of the first semiconductor region (51) of the oxide layer (50) and which is electrically connected to the first conductor region (55); and a conductive layer (60) which is formed in contact with the upper surface of the oxide layer (50) and which a plurality of holes (66) or notches. The oxide layer (50) has a plurality of second conductor regions (57, 58), and each of which has a surface exposed inside respective one of the holes or notches of the conductive layer.
摘要翻译: 该半导体器件(100)包括:栅电极(3); 栅极绝缘层(4); 形成在所述栅极绝缘层(4)上并且包括第一导体区域(55)和至少部分地与所述栅极电极(3)重叠的第一半导体区域(51)的氧化物层(50) 位于它们之间的绝缘层(4) 形成为与氧化物层(50)的第一半导体区域(51)的上表面接触的源极(6s); 形成为与氧化物层(50)的第一半导体区域(51)的上表面接触并与第一导体区域(55)电连接的漏电极(6d)。 以及形成为与所述氧化物层(50)的上表面接触并且具有多个孔(66)或凹口的导电层(60)。 氧化物层(50)具有多个第二导体区域(57,58),并且每个第二导体区域具有暴露在导电层的一个或多个孔内的表面。
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公开(公告)号:US20150049290A1
公开(公告)日:2015-02-19
申请号:US14390460
申请日:2013-03-15
发明人: Seiichi Uchida , Seiji Kaneko , Yasuyuki Ogawa , Yutaka Takamaru , Kohhei Tanaka , Mitsuhiro Murata , Akira Shibazaki , Ken Kuboki
IPC分类号: G02F1/1362
CPC分类号: G02F1/136286 , G02F1/134309
摘要: The TFT substrate (10) of this liquid crystal display device (100) includes: a TFT (11) which is provided for each pixel; an upper electrode (12) which is electrically connected to the TFT's drain electrode (11d); a lower electrode (13) which is arranged under the upper electrode; and a dielectric layer (14) which is arranged between the upper and lower electrodes. Its counter substrate (20) includes a counter electrode (21) which faces the upper electrode. The upper electrode has first and second regions (R1, R2) which have mutually different electrode structures, and a third region (R3) which electrically connects the first and second regions to the drain electrode. The third region of the upper electrode includes a symmetrical connecting portion (12c) that is a conductive film pattern, of which the shape is substantially symmetrical with respect to a virtual line (L1) that splits each pixel into two adjacent regions in a row direction.
摘要翻译: 该液晶显示装置(100)的TFT基板(10)具备:为每个像素设置的TFT(11) 与TFT的漏电极(11d)电连接的上电极(12); 布置在所述上电极下方的下电极(13); 以及布置在上电极和下电极之间的电介质层(14)。 其对置基板(20)包括面向上电极的对电极(21)。 上电极具有彼此不同的电极结构的第一和第二区域(R1,R2),以及将第一和第二区域电连接到漏电极的第三区域(R3)。 上电极的第三区域包括对称连接部分(12c),其是导电膜图案,其形状相对于将每个像素分成行方向的两个相邻区域的虚拟线(L1)基本对称 。
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公开(公告)号:US10197874B2
公开(公告)日:2019-02-05
申请号:US15572539
申请日:2016-06-24
发明人: Kuniaki Okada , Seiichi Uchida
IPC分类号: G02F1/136 , G02F1/1362 , G02F1/1335 , G02F1/1339 , G02F1/1343 , G02F1/1368 , H01L29/786 , H01L27/12 , H01L29/24 , H01L29/66
摘要: A first substrate (10) of a liquid crystal display device (100) includes a TFT (2) that includes an oxide semiconductor layer (2a). A second substrate (20) includes a color filter layer (22) and a light-shielding layer (21). The light-shielding layer has a first TFT light-shielding portion (21t1) for each row in at least a blue pixel column, and a second TFT light-shielding portion (21t2) every n rows (n represents an integer of 2 or more) in a pixel column in which at least one type of color filter other than blue color filters is provided, the second TFT light-shielding portion having a larger area than the first TFT light-shielding portion. A columnar spacer (40) is arranged so as not to overlap the first TFT light-shielding portion but to overlap the second TFT light-shielding portion.
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公开(公告)号:US09933676B2
公开(公告)日:2018-04-03
申请号:US15100700
申请日:2014-11-28
发明人: Kazuatsu Ito , Tadayoshi Miyamoto , Seiichi Uchida
IPC分类号: G02F1/1362 , G02F1/1368 , G02F1/1339 , G02F1/1343 , G02F1/1333 , G09G3/36
CPC分类号: G02F1/136286 , G02F1/1339 , G02F1/134309 , G02F1/136213 , G02F1/1368 , G02F2001/133388 , G02F2201/123 , G02F2202/10 , G09G3/3648 , G09G2320/0219 , G09G2320/0247
摘要: A liquid crystal panel (100) includes a pair of substrates (10, 30); a liquid crystal layer (40) provided between the pair of substrates; and a sealing member (42) provided so as to surround the liquid crystal layer. A plurality of pixels (P1, P2) are provided in a matrix in a region surrounded by the sealing member. Each of the plurality of pixels includes an oxide semiconductor TFT (5) provided in one substrate (10) of the pair of substrates; and a pixel electrode (19) provided in the one substrate and connected with the oxide semiconductor TFT. Each of the plurality of pixels is configured such that when the oxide semiconductor TFT is switched from an on-state to an off-state, a level of a voltage to be applied to the liquid crystal layer by use of the pixel electrode is shifted in a negative direction by a pull-in voltage ΔVd. A pull-in voltage ΔVd1 in a first pixel (P1) among the plurality of pixels is lower than a pull-in voltage ΔVd2 in a second pixel (P2) located farther from the sealing member than the first pixel.
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公开(公告)号:US09276126B2
公开(公告)日:2016-03-01
申请号:US14375914
申请日:2013-01-24
发明人: Tadayoshi Miyamoto , Kazuatsu Ito , Shigeyasu Mori , Mitsunobu Miyamoto , Yasuyuki Ogawa , Makoto Nakazawa , Seiichi Uchida , Takuya Matsuo
IPC分类号: H01L29/12 , H01L29/786 , G02F1/1368 , H01L29/49 , H01L27/12 , H01L29/45 , H01L29/66
CPC分类号: H01L29/7869 , G02F1/1368 , G02F2201/40 , G02F2202/10 , H01L27/1225 , H01L27/1259 , H01L29/45 , H01L29/4908 , H01L29/66969 , H01L29/78693
摘要: This semiconductor device (100A) includes: a substrate (1); a gate electrode (3) and a first transparent electrode (2) which are formed on the substrate (1); a first insulating layer (4) formed over the gate electrode (3) and the first transparent electrode (2); an oxide semiconductor layer (5) formed on the first insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); and a second transparent electrode (7) electrically connected to the drain electrode (6d). At least a portion of the first transparent electrode (2) overlaps with the second transparent electrode (7) with the first insulating layer (4) interposed between them, and the oxide semiconductor layer (5) and the second transparent electrode (7) are formed out of the same oxide film.
摘要翻译: 该半导体器件(100A)包括:衬底(1); 形成在基板(1)上的栅电极(3)和第一透明电极(2); 形成在栅电极(3)和第一透明电极(2)上的第一绝缘层(4); 形成在所述第一绝缘层(4)上的氧化物半导体层(5); 电连接到氧化物半导体层(5)的源极和漏极(6s,6d); 和与漏电极(6d)电连接的第二透明电极(7)。 第一透明电极(2)的至少一部分与第二透明电极(7)重叠,第一绝缘层(4)插入其间,氧化物半导体层(5)和第二透明电极(7)为 由相同的氧化膜形成。
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公开(公告)号:US20150243790A1
公开(公告)日:2015-08-27
申请号:US14408628
申请日:2013-06-11
发明人: Seiichi Uchida , Tadayoshi Miyamoto , Yasuyuki Ogawa , Yutaka Takamaru , Kazuatsu Ito , Takuya Matsuo , Shigeyasu Mori
IPC分类号: H01L29/786 , H01L29/66 , H01L21/441 , H01L21/02 , H01L21/425 , H01L29/24 , H01L29/45
CPC分类号: H01L29/7869 , G02F1/1368 , H01L21/02565 , H01L21/425 , H01L21/441 , H01L21/443 , H01L27/1225 , H01L27/124 , H01L29/24 , H01L29/45 , H01L29/66969
摘要: This TFT substrate (100A) includes: a gate connecting layer (3a) formed on a substrate (1) out of a same conductive film as a gate electrode (3) or a transparent connecting layer (2a) formed on the substrate (1) out of a same conductive film as a first transparent electrode (2); an oxide layer (5z) which is formed on an insulating layer (4) and which includes at least one conductor region (5a); and a source connecting layer (6a) formed on the oxide layer (5z) out of a same conductor film as a source electrode (6s). The source connecting layer (6a) is electrically connected to either the gate connecting layer (3a) or the transparent connecting layer (2a) via the at least one conductor region (5a).
摘要翻译: 该TFT基板(100A)包括:与形成在基板(1)上的栅极(3)或透明连接层(2a)相同的导电膜形成在基板(1)上的栅极连接层(3a) 与第一透明电极(2)相同的导电膜; 形成在绝缘层(4)上并且包括至少一个导体区域(5a)的氧化物层(5z); 以及在与源电极(6s)相同的导体膜上形成在氧化物层(5z)上的源极连接层(6a)。 源极连接层(6a)经由至少一个导体区域(5a)与栅极连接层(3a)或透明连接层(2a)电连接。
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公开(公告)号:US20150084039A1
公开(公告)日:2015-03-26
申请号:US14396079
申请日:2013-04-22
发明人: Yutaka Takamaru , Kazuatsu Ito , Tadayoshi Miyamoto , Mitsunobu Miyamoto , Makoto Nakazawa , Yasuyuki Ogawa , Seiichi Uchida , Shigeyasu Mori
IPC分类号: H01L27/12 , H01L29/66 , H01L21/425 , H01L29/786
CPC分类号: H01L27/124 , G02F1/13452 , G02F1/1368 , H01L21/425 , H01L27/1225 , H01L27/1288 , H01L29/66969 , H01L29/78606 , H01L29/7869
摘要: This semiconductor device (100A) includes: an oxide layer (15) which includes a semiconductor region (5) and a conductor region (7) that contacts with the semiconductor region; a source electrode (6s) and a drain electrode (6d) which are electrically connected to the semiconductor region; an insulating layer (11) formed on the source and drain electrodes; a transparent electrode (9) arranged to overlap at least partially with the conductor region with the insulating layer interposed between them; a source line (6a) formed out of the same conductive film as the source electrode; and a gate extended line (3a) formed out of the same conductive film as a gate electrode (3). The source line is electrically connected to the gate extended line via a transparent connecting layer (9a) which is formed out of the same conductive film as the transparent electrode.
摘要翻译: 该半导体器件(100A)包括:包括半导体区域(5)的氧化物层(15)和与半导体区域接触的导体区域(7); 与半导体区域电连接的源电极(6s)和漏电极(6d) 形成在所述源极和漏极上的绝缘层(11); 透明电极(9),布置成至少部分地与导体区域重叠,绝缘层插入它们之间; 由与源电极相同的导电膜形成的源极线(6a); 以及由与栅极(3)相同的导电膜形成的栅极延伸线(3a)。 源极线通过与透明电极相同的导电膜形成的透明连接层(9a)电连接到栅极延伸线。
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