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公开(公告)号:US20210103307A1
公开(公告)日:2021-04-08
申请号:US17124552
申请日:2020-12-17
Applicant: Sharp Kabushiki Kaisha
Inventor: Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC: G05F1/46 , G02F1/1362 , G02F1/1368 , G09G3/36 , H03K17/042 , H03K17/16 , H03K17/687 , G02F1/1333 , G02F1/1335 , G02F1/1345 , H01L27/12
Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号:US20160370635A1
公开(公告)日:2016-12-22
申请号:US15253152
申请日:2016-08-31
Applicant: Sharp Kabushiki Kaisha
Inventor: Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC: G02F1/1345 , G02F1/1362 , G02F1/1335 , G02F1/1333 , H01L27/12 , G02F1/1368
CPC classification number: G05F1/467 , G02F1/133308 , G02F1/133514 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0281 , G09G2310/0286 , G09G2320/0223 , H01L27/124 , H01L27/1255 , H01L27/3272 , H03K17/04206 , H03K17/165 , H03K17/687
Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号:US20160187739A1
公开(公告)日:2016-06-30
申请号:US14908490
申请日:2014-07-24
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Yosuke IWATA , Mitsuhiro MURATA , Kouhei TANAKA , Tadashi OHTAKE , Ryo YONEBAYASHI
IPC: G02F1/1343 , G02F1/1368
CPC classification number: G02F1/134309 , G02F1/134363 , G02F1/1368
Abstract: A liquid crystal display device includes: a first substrate; a second substrate facing the first substrate; and a liquid crystal layer sandwiched between the first substrate and the second substrate. The first substrate has thereon a first planar electrode, a first dielectric layer on the first planar electrode, and a pair of comb-shaped electrodes on the first dielectric layer. The second substrate has thereon a second planar electrode and a second dielectric layer on the second planar electrode. The liquid crystal layer includes liquid crystal molecules having a positive dielectric anisotropy. The liquid crystal display device is configured such that, when displaying a minimum gradation, a same voltage is applied to the pair of comb-shaped electrodes, and a relationship among voltages applied to the first planar electrode, the pair of comb-shaped electrodes, and the second planar electrode satisfies a prescribed relational expression.
Abstract translation: 液晶显示装置包括:第一基板; 面对所述第一基板的第二基板; 以及夹在第一基板和第二基板之间的液晶层。 第一基板上具有第一平面电极,第一平面电极上的第一电介质层和第一介电层上的一对梳状电极。 第二基板上具有第二平面电极和第二平面电极上的第二电介质层。 液晶层包括具有正介电各向异性的液晶分子。 液晶显示装置被配置为使得当显示最小灰度时,对一对梳状电极施加相同的电压,并且施加到第一平面电极,一对梳状电极的电压之间的关系, 第二平面电极满足规定的关系式。
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公开(公告)号:US20200184909A1
公开(公告)日:2020-06-11
申请号:US16336036
申请日:2017-09-22
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Mitsuhiro MURATA , Takuma TOMOTOSHI , Yosuke IWATA
IPC: G09G3/34 , G02F1/1337 , G02F1/137 , G09G3/36
Abstract: The liquid crystal display device according to the present invention includes a first substrate, a second substrate, a liquid crystal layer, and a display region including multiple display units arranged in a matrix. The first substrate includes a first electrode, and a second electrode. Liquid crystal molecules are aligned parallel to the first substrate in a no-voltage-applied state. The second electrode in each of the display units is provided with an opening having a certain shape. The display units include at least one high-speed display unit in which four liquid crystal domains are generated in the light-transmitting region in a voltage-applied state and at least one high-luminance display unit in which two liquid crystal domains are generated in the light-transmitting region in the voltage-applied state. A data signal is written in the at least one high-speed display unit later than in the high-luminance display unit within one frame period.
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公开(公告)号:US20190302815A1
公开(公告)日:2019-10-03
申请号:US16444105
申请日:2019-06-18
Applicant: Sharp Kabushiki Kaisha
Inventor: Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC: G05F1/46 , H01L27/12 , H03K17/042 , H03K17/16 , H03K17/687 , G02F1/1362 , G02F1/1333 , G02F1/1335 , G02F1/1368 , G02F1/1345 , G09G3/36
Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号:US20170139290A1
公开(公告)日:2017-05-18
申请号:US15318988
申请日:2015-07-17
Applicant: Sharp Kabushiki Kaisha
Inventor: Yosuke IWATA , Mitsuhiro MURATA , Satoshi MATSUMURA
IPC: G02F1/1343 , G02F1/1368 , G02F1/1335
CPC classification number: G02F1/134363 , G02F1/133528 , G02F1/133707 , G02F1/13439 , G02F1/1368 , G02F2001/134318 , G02F2001/134372 , G02F2001/134381 , G02F2202/10 , G02F2203/64 , G02F2203/66
Abstract: The present invention provides a liquid crystal display device capable of achieving a high response speed. The liquid crystal display device includes: an upper substrate and a lower substrate; and a liquid crystal layer disposed between the upper and lower substrates, the upper substrate including an electrode, the lower substrate including paired electrodes, the liquid crystal layer containing liquid crystal molecules that are aligned in parallel with the main surfaces of the upper and lower substrates with no voltage applied, the liquid crystal display device being configured to provide one of white display and black display by utilizing an electric field generated between the paired electrodes of the lower substrate to rotate the liquid crystal molecules in one direction in a plane parallel to the main surfaces, and the other of white display and black display by utilizing an electric field generated by the respective electrodes of the upper and lower substrates to rotate the liquid crystal molecules in the opposite direction from the one direction in the plane parallel to the main surfaces.
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公开(公告)号:US20180011504A1
公开(公告)日:2018-01-11
申请号:US15710961
申请日:2017-09-21
Applicant: Sharp Kabushiki Kaisha
Inventor: Kohei TANAKA , Hidefumi YOSHIDA , Takeshi NOMA , Ryo YONEBAYASHI , Takayuki NISHIYAMA , Mitsuhiro MURATA , Yosuke IWATA
IPC: G05F1/46 , G02F1/1333 , H03K17/042 , H03K17/16 , G02F1/1345 , G02F1/1362 , G02F1/1368 , G09G3/36 , H01L27/12 , H03K17/687 , G02F1/1335 , H01L27/32
CPC classification number: G05F1/467 , G02F1/133308 , G02F1/133514 , G02F1/13454 , G02F1/136213 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2201/123 , G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0281 , G09G2310/0286 , G09G2320/0223 , H01L27/124 , H01L27/1255 , H01L27/3272 , H03K17/04206 , H03K17/165 , H03K17/687
Abstract: A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
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公开(公告)号:US20150325187A1
公开(公告)日:2015-11-12
申请号:US14652344
申请日:2013-12-13
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Kohhei TANAKA , Mitsuhiro MURATA , Akihito JINDA , Yosuke IWATA
IPC: G09G3/36 , G02F1/1343 , G02F1/1345
CPC classification number: G09G3/3614 , G02F1/134363 , G02F1/13454 , G02F2001/134381 , G09G2300/0495
Abstract: Provided is a liquid crystal display device in which both a vertical electric field and a horizontal electric field are used and flickering is hardly recognized. The liquid crystal display device includes a liquid crystal panel and a control unit. The control unit includes a horizontal electric field control unit and a vertical electric field control unit. The horizontal electric field control unit controls the potentials of pairs of drive electrodes included in the liquid crystal panel, and thereby controls a horizontal electric field that is generated between each pair of drive electrodes. The vertical electric field control unit controls the potentials of a common electrode and an opposite electrode included in the liquid crystal panel, and thereby controls a vertical electric field that is generated between the common electrode and the opposite electrode. The horizontal electric field control unit controls the intensity and the polarity of the horizontal electric field when the vertical electric field control unit is causing the vertical electric field to be generated. The vertical electric field control unit inverts the polarity of the vertical electric field when the horizontal electric field control unit is maintaining the polarity of the horizontal electric field.
Abstract translation: 提供一种其中使用垂直电场和水平电场两者并且几乎不识别闪烁的液晶显示装置。 液晶显示装置包括液晶面板和控制单元。 控制单元包括水平电场控制单元和垂直电场控制单元。 水平电场控制单元控制液晶面板中包括的驱动电极对的电位,从而控制在每对驱动电极之间产生的水平电场。 垂直电场控制单元控制液晶面板中包含的公共电极和对置电极的电位,从而控制在公共电极和对置电极之间产生的垂直电场。 当垂直电场控制单元产生垂直电场时,水平电场控制单元控制水平电场的强度和极性。 当水平电场控制单元保持水平电场的极性时,垂直电场控制单元反转垂直电场的极性。
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公开(公告)号:US20150301412A1
公开(公告)日:2015-10-22
申请号:US14437659
申请日:2013-10-18
Applicant: Sharp Kabushiki Kaisha
Inventor: Yosuke IWATA , Mitsuhiro MURATA , Kouhei TANAKA , Akihito JINDA
IPC: G02F1/1343 , H01L29/24 , H01L29/786
CPC classification number: G02F1/134309 , G02F1/134336 , G02F1/13439 , G02F2001/134381 , H01L27/1225 , H01L29/24 , H01L29/7869
Abstract: The present invention provides an ON-ON switching mode liquid crystal display device capable of enabling multi-V-T within a pixel and adequately improving viewing angle properties while adequately preventing any decrease in the liquid crystal molecule rising response rate. The liquid crystal display device is provided with at least a first substrate, a second substrate facing the first substrate, and a liquid crystal layer enclosed between the second and first substrates; wherein the first substrate has a first electrode, a second electrode and a third electrode having an opening, the second substrate has a planar fourth electrode, the first electrode and second electrode are a pair of comb-shaped electrodes that include a plurality of fingers on the liquid crystal layer side of the third electrode, and when viewing the main surface of the substrate from above, the ratio of overlap between the third electrode and a region between a finger of the first electrode and an adjacent finger of the second electrode is different within a pixel.
Abstract translation: 本发明提供能够在像素内实现多V-T并充分改善视角特性的ON-ON开关模式液晶显示装置,同时充分防止液晶分子上升响应速率的任何降低。 所述液晶显示装置具有至少第一基板,与所述第一基板对置的第二基板以及封闭在所述第二基板和所述第一基板之间的液晶层。 其中所述第一基板具有第一电极,第二电极和具有开口的第三电极,所述第二基板具有平面第四电极,所述第一电极和第二电极是包括多个指状物的一对梳状电极 第三电极的液晶层侧,并且当从上方观察基板的主表面时,第三电极与第一电极的手指与第二电极的相邻手指之间的区域之间的重叠比例是不同的 在一个像素内
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公开(公告)号:US20170269441A1
公开(公告)日:2017-09-21
申请号:US15506580
申请日:2015-08-19
Applicant: Sharp Kabushiki Kaisha
Inventor: Mitsuhiro MURATA , Yosuke IWATA , Satoshi MATSUMURA , Hidefumi YOSHIDA
IPC: G02F1/1343 , G02F1/1368
CPC classification number: G02F1/134363 , G02F1/133707 , G02F1/13439 , G02F1/1368 , G02F2001/134372 , G02F2001/134381 , G02F2201/123
Abstract: The present invention provides a liquid crystal display device that can improve the response speed from OFF state to ON state. The present invention includes a first substrate, a second substrate, a horizontal-alignment type liquid crystal layer between the first and second substrates, and pixels. The first substrate includes a planar first opposite electrode, a plurality of first pixel electrodes each having a linear shape and arranged parallel to one another in the pixels, and a first insulating layer between the first
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