公开(公告)号：US11581050B2

公开(公告)日：2023-02-14

申请号：US17357488

申请日：2021-06-24

申请人： SK hynix Inc.

发明人： Dong Uk Lee ,  Hae Chang Yang ,  Hun Wook Lee

IPC分类号： G11C16/34 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/28 ,  G11C16/30

摘要： The present technology relates to an electronic device. A memory device that controls a voltage applied to each line to prevent or mitigate a channel negative boosting phenomenon during a sensing operation includes a memory block connected to a plurality of lines, a peripheral circuit configured to perform a sensing operation on selected memory cells connected to a selected word line among the plurality of lines, and control logic configured to control voltages applied to drain select lines, source select lines, and word lines between the drain select lines and the source select lines among the plurality of lines, during the sensing operation and an equalizing operation performed after the sensing operation. The control logic controls a voltage applied to an unselected drain select line according to whether a cell string is shared with a selected drain select line among the drain select lines, during the sensing operation.

公开(公告)号：US11482290B2

公开(公告)日：2022-10-25

申请号：US17208782

申请日：2021-03-22

申请人： SK hynix Inc.

发明人： Dong Uk Lee ,  Hae Chang Yang ,  Hun Wook Lee

IPC分类号： G11C16/34 ,  G11C16/32 ,  G11C16/26 ,  G11C16/30 ,  G11C16/10

摘要： A controller including a test manager configured to output a program command for performing a program operation of a memory block and a suspend command for stopping the program operation, and a memory interface configured to transmit the program command to a memory device including the memory block, and transmit the suspend command to the memory device after a set time elapses. The test manager outputs a read command for reading memory cells included in the memory block, the memory interface calculates a count value by counting data output from the memory device in response to the read command, and the test manager generates status information on the memory block according to the count value.

公开(公告)号：US11914885B2

公开(公告)日：2024-02-27

申请号：US17577213

申请日：2022-01-17

申请人： SK hynix Inc.

发明人： Dong Uk Lee ,  Hae Chang Yang ,  Hun Wook Lee

IPC分类号： G11C16/34 ,  G06F3/06 ,  G11C16/04 ,  G11C16/26 ,  G11C16/10 ,  G11C29/52 ,  G11C16/08 ,  G06F12/02 ,  G11C29/50

CPC分类号： G06F3/0653 ,  G06F3/064 ,  G06F3/0655 ,  G06F3/0679 ,  G06F12/0246 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/349 ,  G11C16/3427 ,  G11C16/3459 ,  G11C29/50004 ,  G11C29/52

摘要： The present disclosure provides a memory controller including a state detector detecting whether the memory device is in an idle state, a program controller, based on detection information that indicates a state of the memory device, selecting neighboring strings that are adjacent to a string that is coupled to a memory cell, among the memory cells, on which a program operation or a read operation was performed before the detecting, selecting monitoring memory cells that are coupled to at least one word line, the memory cells being a part of the neighboring strings, and controlling the memory device to perform a plurality of loops to program the monitoring memory cells, and a bad block selector selecting a memory block with the monitoring memory cells as a bad block based on a rate of increase in threshold voltage of a threshold voltage distribution of the monitoring memory cells.

公开(公告)号：US11749351B2

公开(公告)日：2023-09-05

申请号：US17404652

申请日：2021-08-17

申请人： SK hynix Inc.

发明人： Dong Uk Lee ,  Hae Chang Yang ,  Hun Wook Lee

IPC分类号： G11C16/04 ,  G11C16/34 ,  G11C16/10 ,  G11C16/14 ,  G11C16/08 ,  G11C16/30 ,  G11C16/26

CPC分类号： G11C16/102 ,  G11C16/08 ,  G11C16/14 ,  G11C16/26 ,  G11C16/30

摘要： A memory controller that controls a memory device including a memory block includes an initial program controller configured to control the memory device to program at least one or more monitoring memory cells from among memory cells respectively connected to monitoring word lines from among a plurality of word lines connected to the memory block, a pre-read controller configured to generate a shifting information of a threshold voltage distribution of the monitoring memory cells based on a result of reading the monitoring memory cells before a read operation is performed on the memory block, and a pre-program controller configured to control the memory device to perform the read operation after applying a pre-program voltage having a voltage level determined according to the shifting information to the plurality of word lines.

公开(公告)号：US11004504B2

公开(公告)日：2021-05-11

申请号：US16460422

申请日：2019-07-02

申请人： SK hynix Inc.

发明人： Dong Uk Lee ,  Hun Wook Lee

IPC分类号： G11C11/56 ,  G06F11/22 ,  G06F11/10 ,  G11C29/42 ,  G06F13/16

摘要： A controller comprises an error correction circuit configured to check an error bit number of error bits in the read data and correct the error bits; a read retry range setting circuit configured to reset a preset read retry range with respect to the read data, and set a new read retry range based on the error bit number and an error correction capability of the error correction circuit; a read voltage setting circuit configured to reset the set read voltage and set, as a new read voltage, a voltage among a plurality of voltages of the reset read retry range, corresponding to the new read retry range; and a flash control circuit configured to control the memory device to perform a read retry operation on the stored data, using the new read voltage.