STRUCTURE FOR A FRONT-FACING IMAGE SENSOR

    公开(公告)号:US20250015122A1

    公开(公告)日:2025-01-09

    申请号:US18888578

    申请日:2024-09-18

    Applicant: Soitec

    Abstract: A structure for a front-side image sensor comprises a semiconductor substrate, an electrically insulating layer overlying the semiconductor substrate, and an active layer overlying the electrically insulating layer. The semiconductor substrate comprises a trapping layer, the trapping layer including cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the active layer to the electrically insulating layer. The plurality of electrically isolating trenches define a plurality of pixels. Also disclosed is a structure comprises a carrier substrate, an electrically insulating layer overlying the carrier substrate and a trapping layer, and a semiconductive layer overlying the electrically insulating layer. The trapping layer comprises cavities therein. The structure further comprises a plurality of electrically isolating trenches extending vertically through the semiconductive layer to the electrically insulating layer.

    METHOD FOR TRANSFERRING A USE FUL LAYER TO A CARRIER SUBSTRATE

    公开(公告)号:US20220157650A1

    公开(公告)日:2022-05-19

    申请号:US17435631

    申请日:2020-02-26

    Applicant: Soitec

    Abstract: A method for transferring a useful layer to a carrier substrate comprises: joining a front face of a donor substrate to a carrier substrate along a bonding interface to form a bonded structure; annealing the bonded structure to apply a weakening thermal budget thereto and bring a buried weakened plane in the donor substrate to a defined level of weakening, the anneal reaching a maximum hold temperature; and initiating a self-sustained and propagating splitting wave in the buried weakened plane by applying a stress to the bonded structure to lead to the useful layer being transferred to the carrier substrate. The initiation of the splitting wave occurs when the bonded structure experiences a thermal gradient defining a hot region and a cool region of the bonded structure, the stress being applied locally in the cool region, and the hot region experiencing a temperature lower than the maximum hold temperature.

    REMOVABLE STRUCTURE AND REMOVAL METHOD USING THE STRUCTURE

    公开(公告)号:US20210050249A1

    公开(公告)日:2021-02-18

    申请号:US16969346

    申请日:2019-01-14

    Applicant: Soitec

    Abstract: A detachable structure comprises a carrier substrate and a silicon oxide layer positioned on the substrate at a first interface. The detachable structure is notable in that: the oxide layer has a thickness of less than 200 nm; light hydrogen and/or helium species are distributed deeply and over the entire area of the structure according to an implantation profile, a maximum concentration of which is located in the thickness of the oxide layer; the total dose of implanted light species, relative to the thickness of the oxide layer, exceeds, at least by a factor of five, the solubility limit of these light species in the oxide layer.

    Method for producing a composite structure

    公开(公告)号:US09887124B2

    公开(公告)日:2018-02-06

    申请号:US14900257

    申请日:2014-06-17

    Applicant: Soitec

    CPC classification number: H01L21/76254 H01L21/02236 H01L21/30604

    Abstract: A process for the manufacture of a composite structure includes the following stages: a) providing a donor substrate comprising a first surface and a support substrate; b) forming a zone of weakening in the donor substrate, the zone of weakening delimiting, with the first surface of the donor substrate, a working layer; c) assembling the support substrate and the donor substrate; d) fracturing the donor substrate along the zone of weakening; and e) thinning the working layer so as to form a thinned working layer. Stage b) is carried out so that the working layer exhibits a thickness profile appropriate for compensating for the nonuniformity in consumption of the working layer during stage e).

    METHOD OF IMPLANTATION FOR FRAGILIZATION OF SUBSTRATES
    5.
    发明申请
    METHOD OF IMPLANTATION FOR FRAGILIZATION OF SUBSTRATES 有权
    用于基底层析的植入方法

    公开(公告)号:US20150050797A1

    公开(公告)日:2015-02-19

    申请号:US14386937

    申请日:2013-03-14

    Applicant: Soitec

    Abstract: The disclosure relates to a method for implantation of atomic or ionic species into a batch of substrates made of semiconductor material, in which: each substrate made of semiconductor material is positioned on a respective support of a batch implanter, each substrate comprising a thin layer of electrical insulator on its surface; and a dose of at least one ionic or atomic species is implanted over the whole surface of the substrates, through their layer of insulator, so as to form a fragilization region within each substrate and to bound there a thin layer of semiconductor material between the thin layer of insulator and the fragilization region of the substrate, the implantation method being characterized in that, during the method, each support on which a substrate is positioned has at least two separate inclinations with respect to the plane orthogonal to the direction of implantation of the species in order to improve the implantation depth of the species in the substrate. The disclosure also relates to structures of the semiconductor-on-insulator type obtained by the implementation of the implantation method.

    Abstract translation: 本发明涉及一种用于将原子或离子物质注入由半导体材料制成的一批衬底中的方法,其中:由半导体材料制成的每个衬底位于批量注入机的相应支撑件上,每个衬底包括薄层 表面电绝缘子; 并且在衬底的整个表面上通过它们的绝缘体层注入至少一种离子或原子物质的剂量,以在每个衬底内形成脆性区域,并在其之间形成薄层半导体材料 绝缘体层和基板的脆性区域,该注入方法的特征在于,在该方法期间,其上定位有基板的每个支撑件具有至少两个相对于垂直于植入方向的平面的独立倾斜 物种以提高物质在基质中的植入深度。 本公开还涉及通过实施注入方法获得的绝缘体上半导体类型的结构。

    Method for fabrication of a semiconductor structure including an interposer free from any through via

    公开(公告)号:US11114314B2

    公开(公告)日:2021-09-07

    申请号:US16305695

    申请日:2017-05-24

    Applicant: Soitec

    Abstract: A method of forming a semiconductor structure includes introducing, at selected conditions, hydrogen and helium species (e.g., ions) in a temporary support to form a plane of weakness at a predetermined depth therein, and to define a superficial layer and a residual part of the temporary support; forming on the temporary support an interconnection layer; placing at least one semiconductor chip on the interconnection layer; assembling a stiffener on a back side of the at least one semiconductor chip; and providing thermal energy to the temporary support to detach the residual part and provide the semiconductor structure. The interconnection layer forms an interposer free from any through via.

    Method for transferring a useful layer

    公开(公告)号:US09922867B2

    公开(公告)日:2018-03-20

    申请号:US15018465

    申请日:2016-02-08

    Applicant: Soitec

    CPC classification number: H01L21/76254 H01L21/26506 H01L21/324

    Abstract: A method for transferring a useful layer onto a carrier substrate comprises formation of an embrittlement plane by implantation of light species into a first substrate in such a manner as to define the bounds of a useful layer between the plane and a surface of the first substrate, mounting of the carrier substrate onto a surface of the first substrate so as to form an assembly to be fractured, and thermal fracture treatment of the first substrate along the embrittlement plane in such a manner as to transfer the useful layer onto a support. During the thermal fracture treatment, the degree of peripheral adhesion is reduced at an interface between the carrier substrate and the first substrate.

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