公开(公告)号：US20200273745A1

公开(公告)日：2020-08-27

申请号：US15930235

申请日：2020-05-12

Applicant: Sony Corporation

Inventor： Masaki Okamoto

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/522 ,  H01L23/00 ,  H01L27/146 ,  H04N5/378

Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.

公开(公告)号：US11177161B2

公开(公告)日：2021-11-16

申请号：US15930235

申请日：2020-05-12

Applicant: Sony Corporation

Inventor： Masaki Okamoto

IPC: H01L21/768 ,  H01L23/48 ,  H01L27/146 ,  H04N5/378 ,  H01L23/522 ,  H01L23/00

Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.

公开(公告)号：US20190198387A1

公开(公告)日：2019-06-27

申请号：US16287648

申请日：2019-02-27

Applicant: Sony Corporation

Inventor： Masaki Okamoto

IPC: H01L21/768 ,  H01L27/146 ,  H01L23/00 ,  H01L23/522 ,  H01L23/48 ,  H04N5/378

CPC classification number: H01L21/76804 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/27 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/1469 ,  H01L2224/24145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/9205 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/0715 ,  H01L2924/13091 ,  H01L2924/1431 ,  H04N5/378 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.

公开(公告)号：US20180158803A1

公开(公告)日：2018-06-07

申请号：US15887242

申请日：2018-02-02

Applicant: Sony Corporation

Inventor： Satoru Wakiyama ,  Masaki Okamoto ,  Yutaka Ooka ,  Reijiroh Shohji ,  Yoshifumi Zaizen ,  Kazunori Nagahata ,  Masaki Haneda

IPC: H01L25/065 ,  H01L27/146 ,  H01L23/48 ,  H01L21/311 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768 ,  H01L21/306

CPC classification number: H01L25/0657 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/1469 ,  H01L2224/32145 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a second wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.

公开(公告)号：US20170069604A1

公开(公告)日：2017-03-09

申请号：US15354871

申请日：2016-11-17

Applicant: Sony Corporation

Inventor： Satoru Wakiyama ,  Masaki Okamoto ,  Yutaka Ooka ,  Reijiroh Shohji ,  Yoshifumi Zaizen ,  Kazunori Nagahata ,  Masaki Haneda

IPC: H01L25/065 ,  H01L27/146 ,  H01L25/00 ,  H01L21/768 ,  H01L21/311 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/1469 ,  H01L2224/32145 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a second wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.

Abstract translation: 提供一种包括半导体器件的半导体器件和电子设备，所述半导体器件包括第一芯片，接合到第一芯片的第一表面侧上的第二芯片，形成为从第一芯片穿透的通孔 第一芯片的第二表面侧到第二半导体基底基板上的第二布线层，以及设置在第一芯片中的贯通电极和半导体基板之间的绝缘层。

公开(公告)号：US11063020B2

公开(公告)日：2021-07-13

申请号：US16521215

申请日：2019-07-24

Applicant: Sony Corporation

Inventor： Satoru Wakiyama ,  Masaki Okamoto ,  Yutaka Ooka ,  Reijiroh Shohji ,  Yoshifumi Zaizen ,  Kazunori Nagahata ,  Masaki Haneda

IPC: H01L25/065 ,  H01L21/768 ,  H01L27/146 ,  H01L23/48 ,  H01L21/306 ,  H01L25/00 ,  H01L21/311 ,  H01L23/00

Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.

公开(公告)号：US09754990B2

公开(公告)日：2017-09-05

申请号：US15084939

申请日：2016-03-30

Applicant: Sony Corporation

Inventor： Masaki Okamoto

IPC: H01L23/48 ,  H01L27/146 ,  H01L21/768 ,  H04N5/378

CPC classification number: H01L21/76804 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/5226 ,  H01L24/27 ,  H01L27/14627 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14689 ,  H01L27/1469 ,  H01L2224/24145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/9205 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2225/06544 ,  H01L2924/0715 ,  H01L2924/13091 ,  H01L2924/1431 ,  H04N5/378 ,  H01L2924/00

Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor wafer including a first substrate and a first insulating layer formed to contact one surface of the first substrate, and a second semiconductor wafer including a second substrate and a second insulating layer, forming a third insulating layer, performing etching so that the second insulating layer remains on a second wiring layer, forming a first connection hole, forming an insulating film on the first connection hole, performing etching of the second insulating layer and the insulating film, forming a second connection hole, and forming a first via formed in inner portions of the connection holes and connected to the second wiring layer, wherein a diameter of the first connection hole formed on the other surface of the first substrate is greater than a diameter of the first connection hole formed on the third insulating layer.

公开(公告)号：US20150179546A1

公开(公告)日：2015-06-25

申请号：US14409634

申请日：2013-06-19

Applicant: SONY CORPORATION

Inventor： Satoru Wakiyama ,  Masaki Okamoto ,  Yutaka Ooka ,  Reijiroh Shohji ,  Yoshifumi Zaizen ,  Kazunori Nagahata ,  Masaki Haneda

IPC: H01L23/48 ,  H01L21/306 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/76805 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/14632 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/1469 ,  H01L2224/32145 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.

Abstract translation: 提供了一种半导体器件，其包括第一半导体基底基板，接合到第一半导体基底基板的第一表面侧的第二半导体基底基板，形成为从第一半导体基板的第二表面侧穿透的通孔 基底基板连接到第二半导体基底基板上的布线层，以及包围形成在第一半导体基底基板内部的贯通电极的周围的绝缘层。

公开(公告)号：US11289525B2

公开(公告)日：2022-03-29

申请号：US15559345

申请日：2016-03-11

Applicant: SONY CORPORATION

Inventor： Hajime Yamagishi ,  Kiyotaka Tabuchi ,  Masaki Okamoto ,  Takashi Oinoue ,  Minoru Ishida ,  Shota Hida ,  Kazutaka Yamane

IPC: H01L27/146 ,  H01L27/14 ,  H01L23/522 ,  H01L23/528 ,  H01L23/552 ,  H01L23/48 ,  H04N5/357 ,  H04N5/365 ,  H04N5/376 ,  H04N5/378

Abstract: This technology relates to a solid-state imaging device and an electronic apparatus by which image quality can be enhanced. The solid-state imaging device includes a pixel region in which a plurality of pixels are arranged, a first wiring, a second wiring, and a shield layer. The second wiring is formed in a layer lower than that of the first wiring, and the shield layer is formed in a layer lower at least than that of the first wiring. This technology is applicable to a CMOS image sensor, for example.

公开(公告)号：US10373934B2

公开(公告)日：2019-08-06

申请号：US15887242

申请日：2018-02-02

Applicant: Sony Corporation

Inventor： Satoru Wakiyama ,  Masaki Okamoto ,  Yutaka Ooka ,  Reijiroh Shohji ,  Yoshifumi Zaizen ,  Kazunori Nagahata ,  Masaki Haneda

IPC: H01L23/48 ,  H01L25/065 ,  H01L27/146 ,  H01L21/768 ,  H01L21/306 ,  H01L25/00 ,  H01L21/311 ,  H01L23/00

Abstract: There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a second wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.