公开(公告)号：US20150001707A1

公开(公告)日：2015-01-01

申请号：US13930980

申请日：2013-06-28

Applicant: STATS ChipPAC, Ltd.

Inventor： Byung Tai Do ,  Arnel Trasporto ,  Linda Pei Ee Chua ,  Asri Yusof

IPC: H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/3121 ,  H01L21/4832 ,  H01L21/568 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/06135 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49433 ,  H01L2224/83191 ,  H01L2224/85411 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. A semiconductor die is disposed on a surface of the base between the conductive posts. An interconnect structure is formed over the semiconductor die and conductive posts. An adhesive layer is disposed over the semiconductor die. A conductive layer is disposed over the adhesive layer. An encapsulant is deposited over the semiconductor die and around the conductive posts. One or more conductive posts are electrically isolated from the substrate. The conductive layer is a removable or sacrificial cap layer. The substrate includes a wafer-shape, panel, or singulated form. The semiconductor die is disposed below a height of the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts.

Abstract translation: 半导体器件具有包括基底和从基底延伸的多个导电柱的基底。 半导体管芯设置在导电柱之间的基座的表面上。 在半导体管芯和导电柱上形成互连结构。 粘合剂层设置在半导体管芯上。 导电层设置在粘合剂层上。 密封剂沉积在半导体管芯上并且在导电柱周围。 一个或多个导电柱与衬底电隔离。 导电层是可移除或牺牲的盖层。 基板包括晶片形状，面板或单切形式。 半导体管芯设置在导电柱的高度的下方。 在半导体管芯，密封剂和导电柱上形成互连结构。

公开(公告)号：US09368423B2

公开(公告)日：2016-06-14

申请号：US13930980

申请日：2013-06-28

Applicant: STATS ChipPAC, Ltd.

Inventor： Byung Tai Do ,  Arnel Trasporto ,  Linda Pei Ee Chua ,  Asri Yusof

IPC: H01L23/52 ,  H01L21/50 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00

CPC classification number: H01L23/3121 ,  H01L21/4832 ,  H01L21/568 ,  H01L23/49582 ,  H01L24/06 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/06135 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49433 ,  H01L2224/83191 ,  H01L2224/85411 ,  H01L2224/85424 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2224/85455 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2224/03 ,  H01L2924/00 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has a substrate including a base and a plurality of conductive posts extending from the base. A semiconductor die is disposed on a surface of the base between the conductive posts. An interconnect structure is formed over the semiconductor die and conductive posts. An adhesive layer is disposed over the semiconductor die. A conductive layer is disposed over the adhesive layer. An encapsulant is deposited over the semiconductor die and around the conductive posts. One or more conductive posts are electrically isolated from the substrate. The conductive layer is a removable or sacrificial cap layer. The substrate includes a wafer-shape, panel, or singulated form. The semiconductor die is disposed below a height of the conductive posts. An interconnect structure is formed over the semiconductor die, encapsulant, and conductive posts.

Abstract translation: 半导体器件具有包括基底和从基底延伸的多个导电柱的基底。 半导体管芯设置在导电柱之间的基座的表面上。 在半导体管芯和导电柱上形成互连结构。 粘合剂层设置在半导体管芯上。 导电层设置在粘合剂层上。 密封剂沉积在半导体管芯上并且在导电柱周围。 一个或多个导电柱与衬底电隔离。 导电层是可移除或牺牲的盖层。 基板包括晶片形状，面板或单切形式。 半导体管芯设置在导电柱的高度的下方。 在半导体管芯，密封剂和导电柱上形成互连结构。