公开(公告)号：US11868524B2

公开(公告)日：2024-01-09

申请号：US17561329

申请日：2021-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kimin Kim ,  Dowan Kim ,  Bonkon Koo ,  Taehwa Hong

IPC: G06F3/01 ,  G06V40/18 ,  G09G3/20

CPC classification number: G06F3/013 ,  G06V40/18 ,  G09G3/2092 ,  G09G2320/0626 ,  G09G2330/021 ,  G09G2354/00

Abstract: An augmented reality (AR) device is provided. The AR device includes a display module configured to output light of a virtual image, a waveguide configured to transmit the output light of the virtual image to an eye of a user and to pass external light therethrough, a gaze tracking sensor configured to obtain information on the eye of the user, the information including a pupil size, a memory storing instructions, and a processor configured to execute the instructions to control the display module to adjust a brightness of the light of the virtual image based on the pupil size.

公开(公告)号：US11721577B2

公开(公告)日：2023-08-08

申请号：US17714546

申请日：2022-04-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dowan Kim ,  Doohwan Lee ,  Seunghwan Baek

IPC: H01L21/768 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L21/76802 ,  H01L21/76877 ,  H01L23/31 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L24/94

Abstract: A method of manufacturing a semiconductor package may include forming a first substrate including a redistribution layer, providing a second substrate including a semiconductor chip and an interconnection layer on the first substrate to connect the semiconductor chip to the redistribution layer, forming a first encapsulation layer covering the second substrate, and forming a via structure penetrating the first encapsulation layer. The forming the via structure may include forming a first via hole in the first encapsulation layer, forming a photosensitive material layer in the first via hole, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material. A surface roughness of a sidewall of the first encapsulation layer may be greater than a surface roughness of a sidewall of the second encapsulation layer.

公开(公告)号：US11373340B2

公开(公告)日：2022-06-28

申请号：US16688370

申请日：2019-11-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dowan Kim ,  Haekyung Jung

IPC: G06T11/00 ,  G06K9/62 ,  G06V20/20

Abstract: A display apparatus providing an augmented reality (AR) object and a controlling method thereof are provided. The display apparatus includes a display, a communication interface, a camera, and a processor configured to control the display to display a first image captured in real time by the camera, and based on first information about a first space included in a second image captured in real time by an external apparatus and location information of a first AR object provided in the first space of the second image being received, control the display to add a second AR object corresponding to the first AR object to the first image and display the second AR object based on second information about a second space included in the first image, the first information about the first space included in the second image, and location information of the first AR object provided in the first space.

公开(公告)号：US11316284B2

公开(公告)日：2022-04-26

申请号：US17036313

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woosik Cho ,  Dowan Kim ,  Yongsang Yun ,  Kyungrok Lee ,  Sunghyup Lee ,  Wonhyung Heo

IPC: H01Q1/22 ,  H01Q21/28 ,  H01Q1/38 ,  H01Q1/24 ,  H01Q1/02 ,  H01Q21/06 ,  H01Q1/52

Abstract: An electronic device includes: a housing including a front plate, a rear plate disposed opposite the front plate, and a side bezel enclosing at least a portion of a space between the front plate and the rear plate; a display disposed in the space and visible through at least a portion of the front plate, wherein the display includes a first layer including a plurality of pixels; and a second layer disposed at the first layer and including an opening; and an antenna module disposed in the space, wherein the antenna module includes a printed circuit board including a first surface facing away from the first layer through the opening and a second surface facing opposite the first surface; at least one antenna element disposed on the first surface, or inside the printed circuit board closer to the first surface than the second surface; and a communication circuit disposed at the second surface of the printed circuit board, the communication circuit configured to transmit and/or receive signals of a selected or designated frequency band through the at least one antenna element.

公开(公告)号：US11302572B2

公开(公告)日：2022-04-12

申请号：US16983298

申请日：2020-08-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dowan Kim ,  Doohwan Lee ,  Seunghwan Baek

IPC: H01L21/768 ,  H01L23/538 ,  H01L23/00 ,  H01L23/31

Abstract: A method of manufacturing a semiconductor package may include forming a first substrate including a redistribution layer, providing a second substrate including a semiconductor chip and an interconnection layer on the first substrate to connect the semiconductor chip to the redistribution layer, forming a first encapsulation layer covering the second substrate, and forming a via structure penetrating the first encapsulation layer. The forming the via structure may include forming a first via hole in the first encapsulation layer, forming a photosensitive material layer in the first via hole, exposing and developing the photosensitive material layer in the first via hole to form a second encapsulation layer having a second via hole, and filling the second via hole with a conductive material. A surface roughness of a sidewall of the first encapsulation layer may be greater than a surface roughness of a sidewall of the second encapsulation layer.

公开(公告)号：US20250167087A1

公开(公告)日：2025-05-22

申请号：US18775998

申请日：2024-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dowan Kim ,  Seung Hun Chae ,  Un-Byoung Kang

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L23/00

Abstract: A semiconductor package includes a wiring substrate that includes a wiring pattern, a dielectric pattern that covers the wiring pattern, a substrate pad on the dielectric pattern and including a recess that extends from a top surface of the substrate pad toward an inside of the substrate pad, a metal layer on a bottom surface of the recess and spaced apart from an inner lateral surface of the recess, and a protection layer on the dielectric pattern and covering the substrate pad. The substrate pad penetrates the dielectric pattern to come into connection with the wiring pattern. The protection layer exposes at least a portion of the metal layer. The protection layer extends from the top surface of the substrate pad to fill a space between a lateral surface of the metal layer and the inner lateral surface of the recess.

公开(公告)号：US20240321804A1

公开(公告)日：2024-09-26

申请号：US18489886

申请日：2023-10-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dowan Kim ,  Jieun Woo ,  Unbyoung Kang ,  Seokbong Park

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/18 ,  H10B80/00

CPC classification number: H01L24/20 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/19 ,  H01L25/18 ,  H10B80/00 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/2101 ,  H01L2224/215 ,  H01L2224/2201 ,  H01L2924/01004 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01031 ,  H01L2924/01042 ,  H01L2924/01044 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/0132 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1433 ,  H01L2924/14361 ,  H01L2924/1437 ,  H01L2924/1441 ,  H01L2924/1443

Abstract: A semiconductor package a first package unit comprising a semiconductor chip; and a redistribution structure on the first package unit, wherein the redistribution structure comprises a plurality of wiring lines and a plurality of insulating layers on the plurality of wiring lines, wherein the plurality of wiring lines comprise first subset including a plurality of outermost wiring lines and a second subset, wherein a vertical distance between the plurality of outermost wiring lines and the first package unit is greater than a vertical distance between the second subset of the plurality of wiring lines and the first package unit, a respective surface roughness of each of the plurality of outermost wiring lines is different, and the respective surface roughness of each of the plurality of outermost wiring lines is based on a respective width of each of the plurality of outermost wiring lines in a horizontal direction.

公开(公告)号：US11917770B2

公开(公告)日：2024-02-27

申请号：US18144592

申请日：2023-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonah Kim ,  Kiwoong Kim ,  Dowan Kim ,  Chiun Park ,  Kwangsung Hwang

IPC: H05K5/00 ,  H01L25/075 ,  H05K5/02

CPC classification number: H05K5/0021 ,  H01L25/0753 ,  H05K5/0214 ,  H05K5/0217

Abstract: A display apparatus includes: a display module including a substrate on which a plurality of light emitting diodes (LEDs) are mounted, a holder covering a rear side of the substrate, a reinforcement member provided on a rear side of the holder, and a fixing member protruding rearward from the holder; a cabinet provided to support the display module and including a plurality of first magnets and a through hole through which the fixing member passes; and a circuit case including a plurality of second magnets and coupled to the cabinet. The display module is coupled to the cabinet by a first magnetic attraction between the plurality of first magnets and the reinforcement member and a second magnetic attraction between the plurality of second magnets and the reinforcement member.

公开(公告)号：US20240280375A1

公开(公告)日：2024-08-22

申请号：US18397299

申请日：2023-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juan LIU ,  Hyuncheol Park ,  Dowan Kim ,  Jie Chen ,  Longhai Wu

IPC: G01C21/00 ,  G06T11/60

CPC classification number: G01C21/383 ,  G06T11/60 ,  G06T2210/04

Abstract: A method for mapping indoor includes: generating, based on a standard house plan of a target house, vectorized house structure data for the target house using a deep neural network; acquiring a first radar map by scanning a travelable space of a first region with a radar, the first region containing at least one room of the target house; and performing image matching-fusion processing based on the first radar map and the house structure data to obtain a house display plan of the target house.