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公开(公告)号:US20220238795A1
公开(公告)日:2022-07-28
申请号:US17402960
申请日:2021-08-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sanghwan PARK , Younghyun KIM , Jaehoon KIM , Heeju SHIN , Sechung OH
IPC: H01L43/08 , H01L27/22 , H01L43/02 , H01L43/10 , H01L23/522 , H01L23/528
Abstract: A semiconductor device including a substrate; a lower electrode on the substrate; a magnetic tunnel junction structure on the lower electrode, the magnetic tunnel junction structure including a pinned layer, a tunnel barrier layer, and a free layer which are sequentially stacked; an upper electrode on the magnetic tunnel junction structure; and an oxidation control layer between the free layer and the upper electrode, the oxidation control layer including at least one filter layer and at least one oxide layer, wherein the at least one filter layer includes MoCoFe.
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公开(公告)号:US20220254994A1
公开(公告)日:2022-08-11
申请号:US17466246
申请日:2021-09-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungil HONG , Jungmin LEE , Younghyun KIM , Junghwan PARK , Heeju SHIN , Se Chung OH
Abstract: A method of fabricating a magnetic memory device comprises forming, on a substrate, a data storage structure including a bottom electrode, a magnetic tunnel junction pattern, and a top electrode, forming a first capping dielectric layer conformally covering lateral and top surfaces of the data storage structure, and forming a second capping dielectric layer on the first capping dielectric layer. The forming the first capping dielectric layer is performed by PECVD in which a first source gas, a first reaction gas, and a first purging gas are supplied. The forming the second capping dielectric layer Is performed by PECVD in which a second source gas, a second reaction gas, and a second purging gas are supplied. The first and second reaction gases are different from each other. The first and second purging gases are different from each other.
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公开(公告)号:US20190136368A1
公开(公告)日:2019-05-09
申请号:US15980348
申请日:2018-05-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ki Woong KIM , Woojin KIM , Sang Hwan PARK , Heeju SHIN , Se Chung OH
Abstract: Provided are sputtering apparatuses and methods of manufacturing magnetic memory devices. The sputtering apparatus includes a process chamber, a stage in the process chamber and configured to load a substrate thereon, and a first sputter gun above the substrate in the process chamber. The first sputter gun is horizontally spaced apart from the substrate. The first sputter gun includes a first target including a first end and a second end, the first end being horizontally closer to the substrate than the second end. A first surface of the first target is inclined relative to a top surface of the substrate. A height of the second end of the first target relative to the top surface of the substrate is greater than that of the first end of the first target.
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公开(公告)号:US20230074076A1
公开(公告)日:2023-03-09
申请号:US17726056
申请日:2022-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Joonmyoung LEE , Whankyun KIM , Eunsun NOH , Heeju SHIN , Junho JEONG
Abstract: A magnetic memory device may include a pinned magnetic pattern and a free magnetic pattern which are stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a capping pattern on the free magnetic pattern, and a non-magnetic pattern between the free magnetic pattern and the capping pattern. The free magnetic pattern may be between the tunnel barrier pattern and the capping pattern. The non-magnetic pattern may include a first non-magnetic metal and boron, and the capping pattern includes a second non-magnetic metal. A boride formation energy of the second non-magnetic metal may be higher than a boride formation energy of the first non-magnetic metal.
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公开(公告)号:US20220383923A1
公开(公告)日:2022-12-01
申请号:US17576047
申请日:2022-01-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Whankyun KIM , Jeong-Heon PARK , Heeju SHIN , Youngjun CHO , Joonmyoung LEE , Junho JEONG
Abstract: Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.
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公开(公告)号:US20180019392A1
公开(公告)日:2018-01-18
申请号:US15451961
申请日:2017-03-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jinwoo LEE , Jeonghee PARK , Dongho AHN , Zhe WU , Heeju SHIN , Ja bin LEE
CPC classification number: H01L45/141 , H01L43/08 , H01L43/10 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/16
Abstract: A semiconductor memory device including first lines and second lines overlapping and intersecting each other, variable resistance memory elements disposed at intersections between the first lines and the second lines, and switching elements disposed between the variable resistance memory elements and the first lines. At least one of the switching elements includes first and second chalcogenide compound layers, and conductive nano-dots disposed between the first and second chalcogenide compound layers.
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公开(公告)号:US20240249760A1
公开(公告)日:2024-07-25
申请号:US18593293
申请日:2024-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Whankyun KIM , Jeong-Heon PARK , Heeju SHIN , YoungJun CHO , Joonmyoung LEE , Junho JEONG
CPC classification number: G11C11/161 , H10B61/00 , H10N50/10 , H10N50/80 , H10N50/85
Abstract: Disclosed is a magnetic memory device including a pinned magnetic pattern and a free magnetic pattern that are sequentially stacked on a substrate, a tunnel barrier pattern between the pinned magnetic pattern and the free magnetic pattern, a top electrode on the free magnetic pattern, and a capping pattern between the free magnetic pattern and the top electrode. The capping pattern includes a lower capping pattern, an upper capping pattern between the lower capping pattern and the top electrode, a first non-magnetic pattern between the lower capping pattern and the upper capping pattern, and a second non-magnetic pattern between the first non-magnetic pattern and the upper capping pattern. Each of the lower capping pattern and the upper capping pattern includes a non-magnetic metal. The first non-magnetic pattern and the second non-magnetic pattern include different metals from each other.
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公开(公告)号:US20230186963A1
公开(公告)日:2023-06-15
申请号:US17970788
申请日:2022-10-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Younghyun KIM , Sechung OH , Heeju SHIN , Jaehoon KIM , Sanghwan PARK , Junghwan PARK
CPC classification number: G11C11/1673 , G11C11/1653 , H01L27/228 , H01L43/02 , H01L43/08 , H01L43/10
Abstract: A magnetoresistive random access memory device includes a pinned layer; a tunnel barrier layer on the pinned layer; a free layer structure on the tunnel barrier layer, the free layer structure including a plurality of magnetic layers and a plurality of metal insertion layers between the magnetic layers; and an upper oxide layer on the free layer structure, wherein each of the metal insertion layers includes a non-magnetic metal material doped with a magnetic material, and the metal insertion layers are spaced apart from each other.
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