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    AUTOMATIC TESTING APPARATUS FOR EMBEDDED SOFTWARE AND AUTOMATIC TESTING METHOD THEREOF
    1.
    发明申请
    AUTOMATIC TESTING APPARATUS FOR EMBEDDED SOFTWARE AND AUTOMATIC TESTING METHOD THEREOF 有权
    嵌入式软件自动测试装置及其自动测试方法

    公开(公告)号：US20140123111A1

    公开(公告)日：2014-05-01

    申请号：US14026042

    申请日：2013-09-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byeong-hu Lee ,  Tai-ryong Kang ,  Sang-deok Kim ,  Yong-hee Park ,  Sang-rae Lee ,  Jae-hoon Lee

    IPC: G06F11/36

    CPC classification number: G06F11/3672 ,  G06F11/3684 ,  G06F11/3688 ,  H04N17/004 ,  H04N21/43635 ,  H04N21/4424 ,  H04N21/443

    Abstract: An automatic test apparatus for embedded software and an automatic testing method thereof, the automatic testing apparatus for embedded software, includes an output detector which collects interface status information in accordance with data transmission/reception from at least one of first and second electronic devices respectively loaded with first and second embedded software and exchanging data therebetween, and extracts a keyword from the collected interface status information, a scenario composer which uses identification information about the first and second embedded software and the extracted keyword, and composes a scenario corresponding to a predetermined event status and a control command generator which generates a control command to reproduce the event status based on the composed scenario. Thus, it is possible to previously detect unpredictable and predictable problems that may occur in interaction between the plurality of embedded software, interface operation to transmit and receive data, etc., and reproduce them.

    Abstract translation: 一种用于嵌入式软件的自动测试装置及其自动测试方法，用于嵌入式软件的自动测试装置包括输出检测器，其根据分别加载的第一和第二电子设备中的至少一个的数据发送/接收来收集接口状态信息 利用第一和第二嵌入式软件在其间交换数据，并从所收集的接口状态信息中提取关键词，使用关于第一和第二嵌入式软件的标识信息和所提取的关键字的场景作曲者，并且构成与预定事件相对应的场景 状态和控制命令生成器，其生成基于组合场景再现事件状态的控制命令。 因此，可以预先检测可能在多个嵌入式软件之间的交互中发生的不可预测和可预测的问题，用于发送和接收数据的接口操作等，并再现它们。

    Analog-to-digital converter and communication device including the same
    3.
    发明授权
    Analog-to-digital converter and communication device including the same 有权

    公开(公告)号：US09893738B2

    公开(公告)日：2018-02-13

    申请号：US15469712

    申请日：2017-03-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-hoon Lee ,  Seung-hyun Oh ,  Jong-woo Lee

    IPC: H04M1/08 ,  H03M1/12 ,  H03M1/08 ,  H04L27/26

    CPC classification number: H03M1/1245 ,  G11C27/02 ,  G11C27/024 ,  H03M1/08 ,  H03M1/468

    Abstract: An analog-to-digital converter includes a sample hold circuit configured to receive an analog input signal based on an operating mode, the operating mode being one of at least two modes including a sample mode and a hold mode. The sample hold circuit includes a first transistor including a control terminal and a first terminal, the first transistor configured to receive a control signal via the control terminal and receive the analog input signal via the first terminal. The analog-to-digital converter further includes a bootstrap switch operationally connected to the control terminal and the first terminal of the first transistor, the bootstrap switch configured to form a first current path from a power source based on the analog input signal and a boosted voltage of the control terminal of the first transistor in the sample mode, the control terminal bing along the first current path in the sample mode.

    Semiconductor device with a fin-shaped active region and a gate electrode
    4.
    发明授权
    Semiconductor device with a fin-shaped active region and a gate electrode 有权

    公开(公告)号：US11038062B2

    公开(公告)日：2021-06-15

    申请号：US16416725

    申请日：2019-05-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-hoon Lee ,  Gi-gwan Park ,  Tae-young Kim

    IPC: H01L29/78 ,  H01L29/08 ,  H01L29/15 ,  H01L29/267 ,  H01L29/20 ,  H01L29/22 ,  H01L29/16 ,  H01L29/66

    Abstract: A semiconductor device includes a substrate including a fin-shaped active region that protrudes from the substrate, a gate insulating film covering a top surface and both side walls of the fin-shaped active region, a gate electrode on the top surface and the both side walls of the fin-shaped active region and covering the gate insulating film, one pair of insulating spacers on both side walls of the gate electrode, one pair of source/drain region on the fin-shaped active region and located on both sides of the gate electrode, and a lower buffer layer between the fin-shaped active region the source/drain region. The source/drain regions include a compound semiconductor material including atoms from different groups. The lower buffer layer includes a compound semiconductor material that is amorphous and includes atoms from different groups.

    HIGH-ELECTRON-MOBILITY TRANSISTOR
    7.
    发明申请
    HIGH-ELECTRON-MOBILITY TRANSISTOR 有权
    高电子移动晶体管

    公开(公告)号：US20140252368A1

    公开(公告)日：2014-09-11

    申请号：US14097709

    申请日：2013-12-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-hoon Lee ,  Chan-ho Park ,  Nam-young Lee

    IPC: H01L29/778 ,  H01L29/205 ,  H01L29/20

    CPC classification number: H01L29/778 ,  H01L29/0843 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/66462 ,  H01L29/7787

    Abstract: A high-electron-mobility transistor (HEMT) device includes a plurality of semiconductor layers formed on a substrate, wherein a two-dimensional electron gas (2DEG) layer is formed in the semiconductor layers; an etch-stop layer formed on the plurality of semiconductor layers; a p-type semiconductor layer pattern formed on the etch-stop layer; and a gate electrode formed on the p-type semiconductor layer pattern.

    Abstract translation: 高电子迁移率晶体管（HEMT）器件包括形成在衬底上的多个半导体层，其中在半导体层中形成二维电子气（2DEG）层; 形成在所述多个半导体层上的蚀刻停止层; 形成在蚀刻停止层上的p型半导体层图案; 以及形成在p型半导体层图案上的栅电极。

    CARRIER AGGREGATED SIGNAL TRANSMISSION AND RECEPTION
    8.
    发明申请
    CARRIER AGGREGATED SIGNAL TRANSMISSION AND RECEPTION 审中-公开

    公开(公告)号：US20200177213A1

    公开(公告)日：2020-06-04

    申请号：US16779763

    申请日：2020-02-03

    Applicant: SAMSUNG ELECTRONICS CO,, LTD.

    Inventor： SEUNG-HYUN OH ,  Chilun Lo ,  Barosaim Sung ,  Jae-hoon Lee ,  Jong-woo Lee

    IPC: H04B1/00 ,  H04L27/26 ,  H03L7/08

    Abstract: Provided are a radio-frequency integrated chip (RFIC) and a wireless communication device including the RFIC. An RFIC configured to receive a carrier aggregated receive signal having at least first and second carrier signals may include first and second carrier receivers configured to generate, from the receive signal, first and second digital carrier signals, respectively. A phase-locked loop (PLL) may output a first frequency signal having a first frequency to the first carrier receiver and the second carrier receiver. The first and second carrier receivers may include first and second analog mixers, respectively, for translating frequencies of the receive signal, using the first frequency signal and the second frequency signal, respectively. Each of the first and second carrier receivers may further include a digital mixer for further translating the frequencies of the receive signal in the digital domain.

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