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    NONVOLATILE MEMORY DEVICE, SYSTEM INCLUDING THE SAME AND METHOD FOR FABRICATING THE SAME
    1.
    发明公开
    NONVOLATILE MEMORY DEVICE, SYSTEM INCLUDING THE SAME AND METHOD FOR FABRICATING THE SAME 审中-公开

    公开(公告)号：US20240062808A1

    公开(公告)日：2024-02-22

    申请号：US18460683

    申请日：2023-09-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kohji KANAMORI ,  Sang Youn JO ,  Jee Hoon HAN

    IPC: G11C11/4093 ,  H10B12/00

    CPC classification number: G11C11/4093 ,  H10B12/50

    Abstract: A nonvolatile memory device includes a first lower interlayer insulation layer and a second lower interlayer insulation layer that are sequentially stacked in a first direction; a lower metal layer disposed in the first lower interlayer insulation layer; and a plurality of lower bonding metals disposed in the first lower interlayer insulation layer and the second lower interlayer insulation layer and spaced apart from each other in a second direction that intersects the first direction. An uppermost surface in the first direction of the lower metal layer is lower than an uppermost surface in the first direction of the plurality of lower bonding metals, and the lower metal layer is placed between the plurality of lower bonding metals.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权

    公开(公告)号：US20220399367A1

    公开(公告)日：2022-12-15

    申请号：US17681247

    申请日：2022-02-25

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seung Yoon KIM ,  Sang Hun CHUN ,  Jee Hoon HAN

    IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11526

    Abstract: A semiconductor memory device includes a cell unit including a stack structure and a channel structure penetrating through the stack structure, the stack structure including at least one string selection gate and a plurality of cell gates, cell separation structures separating the cell unit in a first direction, and gate cutting structures defining regions within the cell unit between adjacent cell separation structures. The cell unit includes a first region defined between a first cell separation structure and a first gate cutting structure and a second region defined between the first gate cutting structure and a second gate cutting structure. A ratio of a region of the at least one string selection gate that is occupied by a conductive material in the second region is greater than a ratio of a region of at least one cell gate that is occupied by the conductive material in the second region.

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20250040140A1

    公开(公告)日：2025-01-30

    申请号：US18603505

    申请日：2024-03-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ju Seong MIN ,  Jun Gyeom KIM ,  Hyun Min KIM ,  Kang-Oh YUN ,  Taek Kyu YOON ,  Dong Jin LEE ,  Jae Duk LEE ,  Jee Hoon HAN

    IPC: H10B43/40 ,  G11C5/06 ,  G11C16/04 ,  H01L25/065 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

    Abstract: A semiconductor memory device comprises a cell structure and a peripheral circuit structure electrically connected to the cell structure. The peripheral circuit structure comprises an active region, a first gate structure comprising a first gate insulating layer intersecting the active region and in contact with the active region, a second gate structure comprising a second gate insulating layer spaced apart from the first gate structure, and in contact with the active region, and a source/drain region between the first gate structure and the second gate structure. A thickness of the first gate insulating layer is less than a thickness of the second gate insulating layer. The source/drain region comprises a first region adjacent to the first gate structure and a second region adjacent to the second gate structure. A depth of the first region is equal to a depth of the second region.

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210249397A1

    公开(公告)日：2021-08-12

    申请号：US17245299

    申请日：2021-04-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kohji KANAMORI ,  Hyun Mog PARK ,  Yong Seok KIM ,  Kyung Hwan LEE ,  Jun Hee LIM ,  Jee Hoon HAN

    IPC: H01L25/18 ,  H01L23/00 ,  H01L27/11556 ,  H01L27/11582

    Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.

    NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
    6.
    发明申请
    NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开

    公开(公告)号：US20200381449A1

    公开(公告)日：2020-12-03

    申请号：US16718498

    申请日：2019-12-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Je Suk MOON ,  Seo-Goo KANG ,  Young Hwan SON ,  Kohji KANAMORI ,  Jee Hoon HAN

    IPC: H01L27/11582 ,  H01L27/11565

    Abstract: A nonvolatile memory device includes a mold structure having a stack of word lines on a substrate and first and second string selection lines on the word lines, a first cutting structure through the mold structure, a second cutting structure through the mold structure, the second cutting structure being spaced apart from the first cutting structure, a channel structure penetrating the mold structure to be connected to the substrate, the channel structure being between the first and second cutting structures, a first cutting line cutting through the first string selection line but not through the second string selection line, the first cutting line being between the first and second cutting structures, and a second cutting line cutting through the second string selection line but not through the first string selection line, the second cutting line being between the second cutting structure and the channel structure.

    SEMICONDUCTOR MEMORY DEVICE
    7.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240155842A1

    公开(公告)日：2024-05-09

    申请号：US18510736

    申请日：2023-11-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyo Joon RYU ,  Seo-Goo KANG ,  Hee Suk KIM ,  Jong Seon AHN ,  Kohji KANAMORI ,  Jee Hoon HAN

    IPC: H10B43/27 ,  H01L23/522 ,  H10B41/27

    CPC classification number: H10B43/27 ,  H01L23/5226 ,  H10B41/27

    Abstract: A semiconductor memory device includes a lower stacked structure with lower metal lines on a substrate, an upper stacked structure with an upper metal line on the lower stacked structure, a vertical structure penetrating the upper and lower stacked structures and including a channel layer, a first cutting line through the upper and lower stacked structures, an upper supporter in a recess on the first cutting line, a second cutting line through the upper and lower stacked structures and spaced apart from the first cutting line, a sub-cutting line through the upper stacked structure while at least partially overlapping the vertical structure in the vertical direction, the sub-cutting line being between the first and second cutting lines, top surfaces of the upper supporter and sub-cutting line being coplanar, and a first interlayer insulating layer surrounding a sidewall of each of the upper supporter and the sub-cutting line.

    NONVOLATILE MEMORY DEVICE, SYSTEM INCLUDING THE SAME AND METHOD FOR FABRICATING THE SAME
    9.
    发明申请
    NONVOLATILE MEMORY DEVICE, SYSTEM INCLUDING THE SAME AND METHOD FOR FABRICATING THE SAME 有权

    公开(公告)号：US20220101911A1

    公开(公告)日：2022-03-31

    申请号：US17465539

    申请日：2021-09-02

    Applicant: SAMSUNG ELECTRONICS co., LTD.

    Inventor： KOHJI KANAMORI ,  Sang Youn JO ,  Jee Hoon HAN

    IPC: G11C11/4093 ,  H01L27/108

    Abstract: A nonvolatile memory device includes a first lower interlayer insulation layer and a second lower interlayer insulation layer that are sequentially stacked in a first direction; a lower metal layer disposed in the first lower interlayer insulation layer; and a plurality of lower bonding metals disposed in the first lower interlayer insulation layer and the second lower interlayer insulation layer and spaced apart from each other in a second direction that intersects the first direction. An uppermost surface in the first direction of the lower metal layer is lower than an uppermost surface in the first direction of the plurality of lower bonding metals, and the lower metal layer is placed between the plurality of lower bonding metals.

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