公开(公告)号：US10352964B2

公开(公告)日：2019-07-16

申请号：US15415034

申请日：2017-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyeong-mi Lee ,  Jeong-ju Park ,  Shi-yong Yi ,  Eun-sung Kim ,  Seung-chul Kwon ,  Sang-ouk Kim ,  Young-joo Choi

IPC: G01Q70/14 ,  G01Q60/28 ,  H01L21/67 ,  G01Q60/42 ,  H01L27/108

Abstract: A method of forming a micropattern, a substrate surface inspection apparatus, a cantilever set for an atomic force microscope, and a method of analyzing a surface of a semiconductor substrate, and a probe tip the method including forming pinning patterns on a semiconductor substrate; forming a neutral pattern layer in spaces between the pinning patterns; and inspecting a surface of a guide layer that includes the pinning patterns and the neutral pattern layer by using an atomic force microscope (AFM).

公开(公告)号：US09437452B2

公开(公告)日：2016-09-06

申请号：US14604123

申请日：2015-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-ju Park ,  Hyoung-hee Kim ,  Kyoung-mi Kim ,  Se-kyung Baek ,  Soo-jin Lee ,  Jae-ho Kim ,  Jung-sik Choi

IPC: H01L21/311 ,  H01L21/3105 ,  H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/3213 ,  G03F7/00

CPC classification number: H01L21/31144 ,  G03F7/0002 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3086 ,  H01L21/31058 ,  H01L21/32139

Abstract: A method of forming a fine pattern includes forming a phase separation guide layer on a substrate, forming a neutral layer on the phase separation guide layer, forming a first pattern including first openings on the neutral layer, forming a second pattern including second openings each having a smaller width than each of the first openings, forming a neutral pattern including guide patterns exposing a portion of the phase separation guide layer by etching an exposed portion of the neutral layer by using the second pattern as an etch mask, removing the second pattern to expose a top surface of the neutral pattern, forming a material layer including a block copolymer on the neutral pattern and the phase separation guide layer exposed through the guide patterns, and forming a fine pattern layer including a first block and a second block on the neutral pattern and the phase separation guide layer.

Abstract translation: 形成精细图案的方法包括在基板上形成相分离引导层，在相分离引导层上形成中性层，在中性层上形成包括第一开口的第一图案，形成包括第二开口的第二图案， 比每个第一开口更小的宽度，通过使用第二图案作为蚀刻掩模蚀刻中性层的暴露部分，形成包括暴露一部分相分离引导层的引导图案的中性图案，将第二图案去除 露出中性图案的顶面，在中性图案上形成包含嵌段共聚物的材料层，通过引导图案露出相分离引导层，并在中性线上形成包括第一块和第二块的精细图案层 图案和相分离引导层。

公开(公告)号：US10468250B2

公开(公告)日：2019-11-05

申请号：US15337145

申请日：2016-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-young Kim ,  Jeong-ju Park ,  Jin Park ,  Hai-sub Na

IPC: G03F7/40 ,  H01L21/033 ,  C11D1/00 ,  C11D11/00 ,  H01L21/027 ,  G03F7/42

Abstract: A rinse solution includes a surfactant and deionized water. The surfactant includes a compound having a branched structure, the compound having a branched structure including a hydrophobic group-containing main chain and a plurality of side chains that are branched from the main chain and have at least one hydrophilic functional group. A method of fabricating an integrated circuit device includes forming a photoresist pattern, followed by applying the rinse solution onto the photoresist pattern.