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    Methods for fabricating semiconductor devices having through electrodes
    1.
    发明授权
    Methods for fabricating semiconductor devices having through electrodes 有权
    制造具有贯通电极的半导体器件的方法

    公开(公告)号：US09543200B2

    公开(公告)日：2017-01-10

    申请号：US14183817

    申请日：2014-02-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kunsang Park ,  Sukyoung Kim ,  Jisoon Park ,  Ju-Il Choi ,  Byung Lyul Park ,  Gilheyun Choi

    IPC: H01L21/768

    CPC classification number: H01L21/76864 ,  H01L21/76873 ,  H01L21/76898

    Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

    Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后，原位退火晶种层; 通过使用种子层的电镀形成导电层，填充所述通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。

    Technology and method for selectively providing network function to application of device
    3.
    发明授权
    Technology and method for selectively providing network function to application of device 有权

    公开(公告)号：US11606457B2

    公开(公告)日：2023-03-14

    申请号：US16961227

    申请日：2019-01-02

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jisoon Park

    IPC: H04M1/72463 ,  G06F3/04817 ,  G06F3/0482

    Abstract: Various embodiments of the present invention relate to a method for controlling a network access right for an application in an electronic device, and an electronic device for operating same. A control method for an electronic device comprises the steps of: receiving an input of a command for switching a mode of an electronic device to a blocking mode; and when a command for switching to the blocking mode is input, blocking a network access right of at least one application which has been preselected by a user from among a plurality of applications in the electronic device.

    Wafer loaders having buffer zones
    4.
    发明授权
    Wafer loaders having buffer zones 有权
    具有缓冲区的晶片装载机

    公开(公告)号：US09502274B2

    公开(公告)日：2016-11-22

    申请号：US14281880

    申请日：2014-05-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yi Koan Hong ,  Byung Lyul Park ,  Jumyong Park ,  Jisoon Park ,  Kyu-Ha Lee ,  Siyoung Choi

    IPC: H01L21/673

    CPC classification number: H01L21/6733 ,  H01L21/6732 ,  H01L21/67323 ,  H01L21/67326

    Abstract: Embodiments of the present inventive concepts provide a wafer loader having one or more buffer zones to prevent damage to a wafer loaded in the wafer loader. The wafer loader may include a plurality of loading sections that protrude from a main body and are configured to be arranged at various locations along an edge of the wafer. Each of the loading sections may include a groove into which the edge of the wafer may be inserted. The loading section may include first and second protrusions having first and second inner sides, respectively, that face each other to define the groove therebetween. At least one of the first and second inner sides may include a recess to define the buffer zone.

    Abstract translation: 本发明构思的实施例提供了具有一个或多个缓冲区的晶片装载器，以防止损坏装载在晶片装载器中的晶片。 晶片装载机可以包括从主体突出的多个装载部分，并被构造成沿着晶片的边缘布置在不同位置。 每个加载部分可以包括槽，其中可以插入晶片的边缘。 装载部分可以包括分别具有彼此面对以限定其间的凹槽的第一和第二内侧的第一和第二突起。 第一和第二内侧中的至少一个可以包括限定缓冲区的凹部。

    Methods for Fabricating Semiconductor Devices Having Through Electrodes
    6.
    发明申请
    Methods for Fabricating Semiconductor Devices Having Through Electrodes 有权
    制造具有电极的半导体器件的方法

    公开(公告)号：US20140235052A1

    公开(公告)日：2014-08-21

    申请号：US14183817

    申请日：2014-02-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kunsang Park ,  Sukyoung Kim ,  Jisoon Park ,  Ju-Il Choi ,  Byung Lyul Park ,  Gilheyun Choi

    IPC: H01L21/768

    CPC classification number: H01L21/76864 ,  H01L21/76873 ,  H01L21/76898

    Abstract: Methods for fabricating semiconductor devices having through electrodes are provided. The method may comprise forming a via hole which opens towards an upper surface of a substrate and disconnects with a lower surface of the substrate; forming a via isolation layer which extends along an inner surface of the via hole and covers the upper surface of the substrate; forming a seed layer on the via isolation layer which extends along the via isolation layer; annealing the seed layer in-situ after forming the seed layer; forming a conductive layer, filling the via hole, by an electroplating using the seed layer; and planarizing the upper surface of the substrate to form a through electrode surrounded by the via isolation layer in the via hole.

    Abstract translation: 提供了具有通孔电极的制造半导体器件的方法。 该方法可以包括形成朝向衬底的上表面打开并且与衬底的下表面断开的通孔; 形成沿所述通孔的内表面延伸并覆盖所述基板的上表面的通孔隔离层; 在沿通孔隔离层延伸的通孔隔离层上形成晶种层; 在形成种子层之后，原位退火晶种层; 通过使用种子层的电镀形成导电层，填充通孔; 并且平坦化衬底的上表面以形成由通孔中的通孔隔离层包围的通孔。

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